JPS56145370A - Logic circuit - Google Patents

Logic circuit

Info

Publication number
JPS56145370A
JPS56145370A JP3798580A JP3798580A JPS56145370A JP S56145370 A JPS56145370 A JP S56145370A JP 3798580 A JP3798580 A JP 3798580A JP 3798580 A JP3798580 A JP 3798580A JP S56145370 A JPS56145370 A JP S56145370A
Authority
JP
Japan
Prior art keywords
signal
shift register
output
lines
logic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3798580A
Other languages
Japanese (ja)
Inventor
Mikiyuki Zaisho
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHIYOU LSI GIJUTSU KENKYU KUMIAI
Original Assignee
CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHIYOU LSI GIJUTSU KENKYU KUMIAI filed Critical CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority to JP3798580A priority Critical patent/JPS56145370A/en
Publication of JPS56145370A publication Critical patent/JPS56145370A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To obtain a reference logic circuit which can obtain the expectation of output response readily and at a high speed by using a programmable logic arrays and a feedback shift register. CONSTITUTION:A logic integrated circuit under test is obtained by programming the function of the logic integrated circuit under test in logic arrays 51 and 52 and selecting the output signal lines of flip-flops 32-1-32-n at the locations predetermined by the feedback shift register 53 by the use of signal selecting lines 301-1- 301-n. The register 53 is initially set by a signal line 303, and a random-number input signal train is applied to input signal lines 101-1-101-m in synchronization with a signal which is applied to a signal line 302. The signal train which appears on an output line 304 is sequentially sent to a separately prepared shift register. Thus, the expectation of the signal train appearing at the output signal lines of the OR array 52 can be readily obtained.
JP3798580A 1980-03-25 1980-03-25 Logic circuit Pending JPS56145370A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3798580A JPS56145370A (en) 1980-03-25 1980-03-25 Logic circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3798580A JPS56145370A (en) 1980-03-25 1980-03-25 Logic circuit

Publications (1)

Publication Number Publication Date
JPS56145370A true JPS56145370A (en) 1981-11-12

Family

ID=12512857

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3798580A Pending JPS56145370A (en) 1980-03-25 1980-03-25 Logic circuit

Country Status (1)

Country Link
JP (1) JPS56145370A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5988664A (en) * 1982-11-08 1984-05-22 インタ−ナシヨナル　ビジネス　マシ−ンズ　コ−ポレ−シヨン Self-test set

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5176040A (en) * 1974-09-03 1976-07-01 Hewlett Packard Yokogawa Dejitarukairono shikensochi
JPS5476037A (en) * 1977-11-30 1979-06-18 Nec Corp Pla logic circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5176040A (en) * 1974-09-03 1976-07-01 Hewlett Packard Yokogawa Dejitarukairono shikensochi
JPS5476037A (en) * 1977-11-30 1979-06-18 Nec Corp Pla logic circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5988664A (en) * 1982-11-08 1984-05-22 インタ−ナシヨナル　ビジネス　マシ−ンズ　コ−ポレ−シヨン Self-test set

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