JPS5787150A - Large-scale integrated circuit - Google Patents
Large-scale integrated circuitInfo
- Publication number
- JPS5787150A JPS5787150A JP16364080A JP16364080A JPS5787150A JP S5787150 A JPS5787150 A JP S5787150A JP 16364080 A JP16364080 A JP 16364080A JP 16364080 A JP16364080 A JP 16364080A JP S5787150 A JPS5787150 A JP S5787150A
- Authority
- JP
- Japan
- Prior art keywords
- test
- output
- pins
- circuit
- level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
Abstract
PURPOSE:To easily perform the DC test of LSI for the subject integrated circuit by a method wheren a mode is designated by sending a switching signal to a plurality of output switching circuits from a decoder, and a signal, with which the logical level of output buffer will be given, is outputted to one of the input terminals. CONSTITUTION:On the LSI with a testing circuit such as a logical operation function and the like, a test mode decoding circuit 16, output signal switching circuits 17-19 to be connected to output buffers 12-14 which output signals to pins 5-7 and input buffers 8-17, for which signals sent from pins 1-4 are inputted, are provided. When a normal operation is performed, signals are inputted to the pin 1, the results of an arithmetic operation are outputted to the pins 5-7, but the control signals A and B of a circuit 15 are turned to L-level. When a DC test is performed, the output E of the circuit 15 is set at H-level, and the signal of the logical level identical to the pin 4 is outputted to the pins 5-7. Also, in the functional test, the combination of logical levels of the pins 2 and 3 is made separately from the DC tset, and the test is performed by giving the H level to the output C or D of the circuit 15. Through these procedures, the DC test can be simplified, and the number of test modes can also be increased by increasing the number of control terminals (pins 2 and 3).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16364080A JPS5787150A (en) | 1980-11-19 | 1980-11-19 | Large-scale integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16364080A JPS5787150A (en) | 1980-11-19 | 1980-11-19 | Large-scale integrated circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5787150A true JPS5787150A (en) | 1982-05-31 |
JPS645461B2 JPS645461B2 (en) | 1989-01-30 |
Family
ID=15777777
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16364080A Granted JPS5787150A (en) | 1980-11-19 | 1980-11-19 | Large-scale integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5787150A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58145140A (en) * | 1982-02-23 | 1983-08-29 | Nec Corp | Semiconductor characteristic measuring device |
JPS604232A (en) * | 1983-06-22 | 1985-01-10 | Toshiba Corp | Method for designating test mode of lsi |
JPS6081836A (en) * | 1983-10-07 | 1985-05-09 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Integrated circuit logic chip |
JPS60150662A (en) * | 1984-01-18 | 1985-08-08 | Hitachi Ltd | Semiconductor integrated logic device |
JPS63301553A (en) * | 1987-05-30 | 1988-12-08 | Toshiba Corp | Semiconductor integrated circuit device |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02106849U (en) * | 1989-02-09 | 1990-08-24 |
-
1980
- 1980-11-19 JP JP16364080A patent/JPS5787150A/en active Granted
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58145140A (en) * | 1982-02-23 | 1983-08-29 | Nec Corp | Semiconductor characteristic measuring device |
JPS604232A (en) * | 1983-06-22 | 1985-01-10 | Toshiba Corp | Method for designating test mode of lsi |
JPS6081836A (en) * | 1983-10-07 | 1985-05-09 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Integrated circuit logic chip |
JPH0533540B2 (en) * | 1983-10-07 | 1993-05-19 | Intaanashonaru Bijinesu Mashiinzu Corp | |
JPS60150662A (en) * | 1984-01-18 | 1985-08-08 | Hitachi Ltd | Semiconductor integrated logic device |
JPS63301553A (en) * | 1987-05-30 | 1988-12-08 | Toshiba Corp | Semiconductor integrated circuit device |
Also Published As
Publication number | Publication date |
---|---|
JPS645461B2 (en) | 1989-01-30 |
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