JPS5779632A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5779632A
JPS5779632A JP15457680A JP15457680A JPS5779632A JP S5779632 A JPS5779632 A JP S5779632A JP 15457680 A JP15457680 A JP 15457680A JP 15457680 A JP15457680 A JP 15457680A JP S5779632 A JPS5779632 A JP S5779632A
Authority
JP
Japan
Prior art keywords
grow
silicon
epitaxial layer
layer
type silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15457680A
Other languages
Japanese (ja)
Inventor
Masaru Ihara
Yoshihiro Arimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15457680A priority Critical patent/JPS5779632A/en
Publication of JPS5779632A publication Critical patent/JPS5779632A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers

Abstract

PURPOSE:To obtain a semiconductor device with enhanced dilelctric withstand voltage and being enabled to intergrated even a high voltage circuit by a method wherein the device is made to have silicon/magnesia spinel/silicon structure. CONSTITUTION:A concave part 12 is formed on a silicon substrate 11, and a magnesia spinel (MgO.Al2O3) layer 13 is made to grow adhering on the substrate 11. Then a P<+> type silicon epitaxial layer 14 is made to grow on the upper face of the MgO.Al2O3 layer, and a P type silicon epitaxial layer 15 is made to grow the same on the upper face thereof. Moreover it is polished up to expose the P type silicon epitaxial layer, and the region in the convex region necessitating to be isolated is oxidized to form silicon dioxide layers 18.
JP15457680A 1980-11-05 1980-11-05 Manufacture of semiconductor device Pending JPS5779632A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15457680A JPS5779632A (en) 1980-11-05 1980-11-05 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15457680A JPS5779632A (en) 1980-11-05 1980-11-05 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5779632A true JPS5779632A (en) 1982-05-18

Family

ID=15587236

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15457680A Pending JPS5779632A (en) 1980-11-05 1980-11-05 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5779632A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5484738A (en) * 1992-06-17 1996-01-16 International Business Machines Corporation Method of forming silicon on oxide semiconductor device structure for BiCMOS integrated circuits

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5484738A (en) * 1992-06-17 1996-01-16 International Business Machines Corporation Method of forming silicon on oxide semiconductor device structure for BiCMOS integrated circuits

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