JPS5775450A - Manufacture of electronic circuit device - Google Patents

Manufacture of electronic circuit device

Info

Publication number
JPS5775450A
JPS5775450A JP15183180A JP15183180A JPS5775450A JP S5775450 A JPS5775450 A JP S5775450A JP 15183180 A JP15183180 A JP 15183180A JP 15183180 A JP15183180 A JP 15183180A JP S5775450 A JPS5775450 A JP S5775450A
Authority
JP
Japan
Prior art keywords
bonding
lead
film
outer lead
cut
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15183180A
Other languages
Japanese (ja)
Other versions
JPH0147894B2 (en
Inventor
Shuji Kondo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP15183180A priority Critical patent/JPS5775450A/en
Publication of JPS5775450A publication Critical patent/JPS5775450A/en
Publication of JPH0147894B2 publication Critical patent/JPH0147894B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49572Lead-frames or other flat leads consisting of thin flexible metallic tape with or without a film carrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To facilitate automatic continuous bonding by handling as it is long film through the entire processes from the processing in which IC chips are attached to the long film until the process to the actual mounting on a substrate to be mounted. CONSTITUTION:The IC chip 1 is bonded to one end 21 of a lead. Then a cut out part is formed at the connecting part between an inner lead holding part 31 and a base film main body 3. A cut in part 8 is formed in base film 3 which fixes and holds the tip of the other end 22 which is to become an outer lead. Then homing treatment of the outer lead which is required at the time when a face up bonding is performed. The lead 22 is bent by this treatment. Then the outer lead bonding is performed by using a bonding device having a bonding tool 11 and cutting tool 12. A connecting part 32' with the film 3 is cut at the same time as the bonding of the outer lead 22 to a wiring pattern 10 on a substrate 9. Thus the mounting as an independent film carrier is completed.
JP15183180A 1980-10-28 1980-10-28 Manufacture of electronic circuit device Granted JPS5775450A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15183180A JPS5775450A (en) 1980-10-28 1980-10-28 Manufacture of electronic circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15183180A JPS5775450A (en) 1980-10-28 1980-10-28 Manufacture of electronic circuit device

Publications (2)

Publication Number Publication Date
JPS5775450A true JPS5775450A (en) 1982-05-12
JPH0147894B2 JPH0147894B2 (en) 1989-10-17

Family

ID=15527256

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15183180A Granted JPS5775450A (en) 1980-10-28 1980-10-28 Manufacture of electronic circuit device

Country Status (1)

Country Link
JP (1) JPS5775450A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS616832A (en) * 1984-06-20 1986-01-13 Matsushita Electric Ind Co Ltd Material to be loaded
JPH01312844A (en) * 1988-06-11 1989-12-18 Nitto Kogyo Co Ltd Method and device for outer lead cut forming of ilb tape
US5681777A (en) * 1992-06-04 1997-10-28 Lsi Logic Corporation Process for manufacturing a multi-layer tab tape semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52156560A (en) * 1976-06-23 1977-12-27 Hitachi Ltd Semiconductor device and its production

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52156560A (en) * 1976-06-23 1977-12-27 Hitachi Ltd Semiconductor device and its production

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS616832A (en) * 1984-06-20 1986-01-13 Matsushita Electric Ind Co Ltd Material to be loaded
JPH0430741B2 (en) * 1984-06-20 1992-05-22
JPH01312844A (en) * 1988-06-11 1989-12-18 Nitto Kogyo Co Ltd Method and device for outer lead cut forming of ilb tape
US5681777A (en) * 1992-06-04 1997-10-28 Lsi Logic Corporation Process for manufacturing a multi-layer tab tape semiconductor device

Also Published As

Publication number Publication date
JPH0147894B2 (en) 1989-10-17

Similar Documents

Publication Publication Date Title
ATE59733T1 (en) A METHOD OF MAKING A SEMICONDUCTOR DEVICE WITH CONDUCTOR PINS.
DE3677155D1 (en) PROGRAMMABLE DEVICE FOR SEMICONDUCTOR INTEGRATED CIRCUIT CHIP.
JPS55111151A (en) Integrated circuit device
JPS5775450A (en) Manufacture of electronic circuit device
JPS5471986A (en) Semiconductor device and production thereof
JPS5389368A (en) Production of semiconductor integrated circuit
JPS5694753A (en) Correction method of semiconductor ic chip mounted substrate
JPS54102971A (en) Semiconductor device
JPS56148840A (en) Mounting structure for ic
JPS6482658A (en) Soldering of semiconductor package
JPS572537A (en) Semiconductor device
JPS56140637A (en) Semiconductor device
JPS6442140A (en) Connection of integrated circuit
JPS5764952A (en) Package for electronic circuit
JPS645895A (en) Tape carrier
JPS5718348A (en) Integrated circuit device
JPS57141947A (en) Manufacture of semiconductor device
JPS6484646A (en) Manufacture of semiconductor package
JPS5745250A (en) Manufacture of semiconductor device
ATE237848T1 (en) ELECTRONIC DEVICE HAVING A CIRCUIT MOUNTED ON A SUPPORT AND METHOD OF PRODUCTION
JPS54152468A (en) Carrier tape for tape carrier
JPS6421935A (en) Tape carrier
JPS5446471A (en) Lead bonding method
JPS6457726A (en) Manufacture of tape carrier type semiconductor device
JPS54131871A (en) Packaging of ic case