JPS5775372A - High-speed fourier conversion processing circuit - Google Patents

High-speed fourier conversion processing circuit

Info

Publication number
JPS5775372A
JPS5775372A JP55151808A JP15180880A JPS5775372A JP S5775372 A JPS5775372 A JP S5775372A JP 55151808 A JP55151808 A JP 55151808A JP 15180880 A JP15180880 A JP 15180880A JP S5775372 A JPS5775372 A JP S5775372A
Authority
JP
Japan
Prior art keywords
circuit
series
supplied
given
complex data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55151808A
Other languages
Japanese (ja)
Other versions
JPH0113580B2 (en
Inventor
Akira Kanemasa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP55151808A priority Critical patent/JPS5775372A/en
Publication of JPS5775372A publication Critical patent/JPS5775372A/en
Publication of JPH0113580B2 publication Critical patent/JPH0113580B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms

Abstract

PURPOSE:To reduce the hardware, by securing such consitution in that the complex data series output of a buffer circuit is fed back in the form of the 2nd input of a selection circuit. CONSTITUTION:For the time shared multiplexed complex data series supplied to terminals 11 and 22, only the data of the 1st frame is selected 2 by a selection signal 91 given from a control signal generating circuit 9. At the same time, the plural feedback data series 101 and 102 are selected 2 the 2nd, 3rd and 4th frames to be delivered in the form of complex data series 111 and 112 respectively. Then the series 111 and 112 plus a complex coefficient 81 given from a coefficient generating circuit 8 receive a butterfly operation 3, and the complex data output series pairs are supplied to an array converting circuit 5 via 1-word delay elements 41 and 42. Delay elements 51 and 52, 61 and 62 plus 71 and 72 are set at a delay extent equivalent to one word, two words and four words respectively. And selection signals 92, 93 and 94 given from the circuit 9 are supplied to switch circuits 53, 63 and 73 respectively.
JP55151808A 1980-10-29 1980-10-29 High-speed fourier conversion processing circuit Granted JPS5775372A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55151808A JPS5775372A (en) 1980-10-29 1980-10-29 High-speed fourier conversion processing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55151808A JPS5775372A (en) 1980-10-29 1980-10-29 High-speed fourier conversion processing circuit

Publications (2)

Publication Number Publication Date
JPS5775372A true JPS5775372A (en) 1982-05-11
JPH0113580B2 JPH0113580B2 (en) 1989-03-07

Family

ID=15526753

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55151808A Granted JPS5775372A (en) 1980-10-29 1980-10-29 High-speed fourier conversion processing circuit

Country Status (1)

Country Link
JP (1) JPS5775372A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5162635A (en) * 1974-10-11 1976-05-31 Takeda Riken Ind Co Ltd DEETAAREIENZAN SHORISOCHI

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5162635A (en) * 1974-10-11 1976-05-31 Takeda Riken Ind Co Ltd DEETAAREIENZAN SHORISOCHI

Also Published As

Publication number Publication date
JPH0113580B2 (en) 1989-03-07

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