JPS5773953A - Production of semiconductor device - Google Patents

Production of semiconductor device

Info

Publication number
JPS5773953A
JPS5773953A JP55149595A JP14959580A JPS5773953A JP S5773953 A JPS5773953 A JP S5773953A JP 55149595 A JP55149595 A JP 55149595A JP 14959580 A JP14959580 A JP 14959580A JP S5773953 A JPS5773953 A JP S5773953A
Authority
JP
Japan
Prior art keywords
electrode
height
bump electrode
plating
bump
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55149595A
Other languages
Japanese (ja)
Inventor
Setsuo Hiraoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP55149595A priority Critical patent/JPS5773953A/en
Publication of JPS5773953A publication Critical patent/JPS5773953A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Electroplating Methods And Accessories (AREA)

Abstract

PURPOSE:To prepare a bump electrode with high speed and dimensionaly accuracy without a concave part in the central part by a method wherein a plating current is increased inproportion to the growth of a bump and a current density is decreased when an electrode comes close to the specified height. CONSTITUTION:An Ag bump electrode 5 is formed by the steeping or jumping type electric plating method on a wafer 1 which consists of a plurality of pellets and is formed with a rear side electrode and an Au electrode 6 formed on the front surface via an opening in an oxidized film 4. During the process of this plating, until the height of the bump electrode 5 reaches h3 that is equvalent to 80-90% of the desired height h1, a plating current is increased in proportion to the increase in the surface area of the bump electrode, which is allowed to increase its height at a certain speed. When the electrode has reached the height h3, a current density is decreased so that the current is prevented from concentrating in the end part of the opening for the oxidized film 4, while the plating layer is grown in such a manner that a small concave part 5' appearing in the central part of the bump electrode has a normal shape. By so doing, a bump electrode with accurate dimensions and shape can be prepared at high speed.
JP55149595A 1980-10-25 1980-10-25 Production of semiconductor device Pending JPS5773953A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55149595A JPS5773953A (en) 1980-10-25 1980-10-25 Production of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55149595A JPS5773953A (en) 1980-10-25 1980-10-25 Production of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5773953A true JPS5773953A (en) 1982-05-08

Family

ID=15478633

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55149595A Pending JPS5773953A (en) 1980-10-25 1980-10-25 Production of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5773953A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59136950A (en) * 1983-01-27 1984-08-06 Seiko Instr & Electronics Ltd Forming method for bump type electrode
JPS60219741A (en) * 1984-04-17 1985-11-02 Seiko Instr & Electronics Ltd Manufacture of semiconductor device
US5053851A (en) * 1991-01-14 1991-10-01 International Business Machines Corp. Metal bump for a thermal compression bond and method for making same
US5059553A (en) * 1991-01-14 1991-10-22 Ibm Corporation Metal bump for a thermal compression bond and method for making same
EP0877419A3 (en) * 1997-05-09 1999-08-18 Mcnc Methods of electroplating solder bumps of uniform height on integrated circuit substrates
US6162344A (en) * 1998-07-22 2000-12-19 Novellus Systems, Inc. Method of electroplating semiconductor wafer using variable currents and mass transfer to obtain uniform plated layer

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59136950A (en) * 1983-01-27 1984-08-06 Seiko Instr & Electronics Ltd Forming method for bump type electrode
JPH0454374B2 (en) * 1983-01-27 1992-08-31 Seiko Instr & Electronics
JPS60219741A (en) * 1984-04-17 1985-11-02 Seiko Instr & Electronics Ltd Manufacture of semiconductor device
US5053851A (en) * 1991-01-14 1991-10-01 International Business Machines Corp. Metal bump for a thermal compression bond and method for making same
US5059553A (en) * 1991-01-14 1991-10-22 Ibm Corporation Metal bump for a thermal compression bond and method for making same
EP0877419A3 (en) * 1997-05-09 1999-08-18 Mcnc Methods of electroplating solder bumps of uniform height on integrated circuit substrates
US6117299A (en) * 1997-05-09 2000-09-12 Mcnc Methods of electroplating solder bumps of uniform height on integrated circuit substrates
US6162344A (en) * 1998-07-22 2000-12-19 Novellus Systems, Inc. Method of electroplating semiconductor wafer using variable currents and mass transfer to obtain uniform plated layer

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