JPS5771152A - Integrated circuit package - Google Patents
Integrated circuit packageInfo
- Publication number
- JPS5771152A JPS5771152A JP14717280A JP14717280A JPS5771152A JP S5771152 A JPS5771152 A JP S5771152A JP 14717280 A JP14717280 A JP 14717280A JP 14717280 A JP14717280 A JP 14717280A JP S5771152 A JPS5771152 A JP S5771152A
- Authority
- JP
- Japan
- Prior art keywords
- package
- constitution
- attained
- main part
- reverse direction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/0651—Wire or wire-like electrical connections from device to substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06582—Housing for the assembly, e.g. chip scale package [CSP]
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Die Bonding (AREA)
Abstract
PURPOSE:To reduce a mounting space through high integration of circuits by a method wherein on a main part of the first package, a main part of the second package, which are supplied with IC chips individually, is palced to take a reverse direction individually, and they are combined by adhesive agent. CONSTITUTION:A package 6 which has an IC chip 2 attached on a ceramic substrate 1 and connected to a lead wire 3 with a wire 4, and a package of the same constitution are laid in layers in reverse direction individually, and inserted into a high temperature atomosphere. After a fusible adhesive glass 5 on each upper surface of the package is fused, it is cooled to a normal temperature, glass 5 is hardened, and a package assembly containig a pair of ICs through both parts jointed hermetically is completed. By this constitution a doubly integrated package can be attained, and a mounting space is reduced to a half value. And because no lid is required on a package, reduction of a price can be attained.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14717280A JPS5771152A (en) | 1980-10-20 | 1980-10-20 | Integrated circuit package |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14717280A JPS5771152A (en) | 1980-10-20 | 1980-10-20 | Integrated circuit package |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5771152A true JPS5771152A (en) | 1982-05-01 |
Family
ID=15424204
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14717280A Pending JPS5771152A (en) | 1980-10-20 | 1980-10-20 | Integrated circuit package |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5771152A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100575590B1 (en) * | 2003-12-17 | 2006-05-03 | 삼성전자주식회사 | Thermal emission type stack package and modules mounting the same |
-
1980
- 1980-10-20 JP JP14717280A patent/JPS5771152A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100575590B1 (en) * | 2003-12-17 | 2006-05-03 | 삼성전자주식회사 | Thermal emission type stack package and modules mounting the same |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CA2159243A1 (en) | Method of Manufacturing Chip-Size Package-Type Semiconductor Device | |
GB2088635B (en) | Encapsulation for semiconductor integrated circuit chip | |
JPS5731166A (en) | Semiconductor device | |
JPS55146944A (en) | Method of fabricating monolithic integrated microelectronic semiconductor circuit | |
EP0361825A3 (en) | Semiconductor chip and method of manufacturing it | |
EP0355955A3 (en) | Connection for semiconductor devices or integrated circuits by coated wires and method of manufacturing the same | |
JPS5771152A (en) | Integrated circuit package | |
JPS57197838A (en) | Semiconductor flip chip element | |
JPS57126154A (en) | Lsi package | |
JPS6459947A (en) | Semiconductor device | |
JPS54104286A (en) | Integrated circuit device | |
JPS6473753A (en) | Semiconductor integrated circuit device | |
JPS57115850A (en) | Chip carrier for semiconductor ic | |
JPS5640268A (en) | Semiconductor device | |
JPS647645A (en) | Semiconductor device and manufacture thereof | |
JPS61136249A (en) | Hybrid ic | |
JPS55165662A (en) | Semiconductor device | |
JPS56146256A (en) | Hybrid ic device | |
KR860001486A (en) | Chip-on-chip semiconductor integrated circuit | |
JPS5718348A (en) | Integrated circuit device | |
JPS56120147A (en) | Integrated circuit package | |
JPS644053A (en) | Semiconductor device | |
JPS6482656A (en) | Sealing structure for hybrid integrated circuit | |
JPS5649549A (en) | Semiconductor device | |
JPS61284951A (en) | Semiconductor device |