JPS576949A - History storage control system - Google Patents

History storage control system

Info

Publication number
JPS576949A
JPS576949A JP8189980A JP8189980A JPS576949A JP S576949 A JPS576949 A JP S576949A JP 8189980 A JP8189980 A JP 8189980A JP 8189980 A JP8189980 A JP 8189980A JP S576949 A JPS576949 A JP S576949A
Authority
JP
Japan
Prior art keywords
write
memory
pulse signal
selected previously
mode selected
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8189980A
Other languages
Japanese (ja)
Inventor
Kazuhiro Hara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP8189980A priority Critical patent/JPS576949A/en
Publication of JPS576949A publication Critical patent/JPS576949A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/073—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a memory management context, e.g. virtual memory or cache management
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To simplify a device and ensure an accurate writing of data, by securing the same period between the write pulse signal and the WE clocksignal and then performing a renewing process of the access address when a coincidence is obtained between the execution step and the write mode selected previously. CONSTITUTION:For a history control system in which the internal state information of a system is written on a history memory 1 in a desired mode in case a fault diagnosis of the system is carried out, an renewal process of the access address is carried out to the memory 1 when a coincidence is obtained between the system execution mode and the write mode selected previously. At the same time, a write pulse signal 3' indicating the write timing to the memory 1 is produced with every write enable WE clock, and the internal state information in a write mode selected previously is written onto the memory 1. Thus the constitution can be simplified without exercising any special control over the production of the write pulse signal.
JP8189980A 1980-06-17 1980-06-17 History storage control system Pending JPS576949A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8189980A JPS576949A (en) 1980-06-17 1980-06-17 History storage control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8189980A JPS576949A (en) 1980-06-17 1980-06-17 History storage control system

Publications (1)

Publication Number Publication Date
JPS576949A true JPS576949A (en) 1982-01-13

Family

ID=13759284

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8189980A Pending JPS576949A (en) 1980-06-17 1980-06-17 History storage control system

Country Status (1)

Country Link
JP (1) JPS576949A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6010358A (en) * 1983-06-29 1985-01-19 インターナショナル　ビジネス　マシーンズ　コーポレーション Internal system measuring/monitoring apparatus

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6010358A (en) * 1983-06-29 1985-01-19 インターナショナル　ビジネス　マシーンズ　コーポレーション Internal system measuring/monitoring apparatus
JPH055136B2 (en) * 1983-06-29 1993-01-21 Intaanashonaru Bijinesu Mashiinzu Corp

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