JPS57123462A - Working analyzing circuit of data processor - Google Patents
Working analyzing circuit of data processorInfo
- Publication number
- JPS57123462A JPS57123462A JP56009990A JP999081A JPS57123462A JP S57123462 A JPS57123462 A JP S57123462A JP 56009990 A JP56009990 A JP 56009990A JP 999081 A JP999081 A JP 999081A JP S57123462 A JPS57123462 A JP S57123462A
- Authority
- JP
- Japan
- Prior art keywords
- processor
- instruction
- working
- ring buffer
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
Abstract
PURPOSE:To attain an analysis of a fault, etc. with high efficiency, by constituting a data processor incorporating a ring buffer memory that can record continuously the state of a processor based on the prescribed conditions and until the prescribed conditions is satisfied. CONSTITUTION:A processor 1 delivers an instruction to a ring buffer control circuit 2 and starts the execution of an instruction after previously setting a working indication to a working indication register 4. The circuit 2 compares the recording conditions with the control line of the processor 1 and gives a writing indication for a state 14 of the processor to a ring buffer memory 3 when a coincidence is obtained through the comparison. The processor 1 accepts an interruption and then proceeds to the fault analyzing routine. Then the processor 1 delivers an instruction to the circuit 2 and gives a reading instruction. Thus the information 31 obtained immediately before the interruption of recording can be read out of the memory 3 via a data line 12.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56009990A JPS57123462A (en) | 1981-01-26 | 1981-01-26 | Working analyzing circuit of data processor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56009990A JPS57123462A (en) | 1981-01-26 | 1981-01-26 | Working analyzing circuit of data processor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS57123462A true JPS57123462A (en) | 1982-07-31 |
Family
ID=11735298
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56009990A Pending JPS57123462A (en) | 1981-01-26 | 1981-01-26 | Working analyzing circuit of data processor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57123462A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59121432A (en) * | 1982-12-16 | 1984-07-13 | Fujitsu Ltd | Print data buffering system of printer |
| WO1994006203A1 (en) * | 1992-09-01 | 1994-03-17 | Fanuc Ltd | Servo waveform display system |
| JPH0736735A (en) * | 1993-07-22 | 1995-02-07 | Agency Of Ind Science & Technol | Debugging device |
| JP2007299126A (en) * | 2006-04-28 | 2007-11-15 | Mitsubishi Electric Corp | Controller and program for controller |
-
1981
- 1981-01-26 JP JP56009990A patent/JPS57123462A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59121432A (en) * | 1982-12-16 | 1984-07-13 | Fujitsu Ltd | Print data buffering system of printer |
| JPS6312290B2 (en) * | 1982-12-16 | 1988-03-18 | Fujitsu Ltd | |
| WO1994006203A1 (en) * | 1992-09-01 | 1994-03-17 | Fanuc Ltd | Servo waveform display system |
| JPH0736735A (en) * | 1993-07-22 | 1995-02-07 | Agency Of Ind Science & Technol | Debugging device |
| JP2007299126A (en) * | 2006-04-28 | 2007-11-15 | Mitsubishi Electric Corp | Controller and program for controller |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS57101957A (en) | Storage control device | |
| ATE125374T1 (en) | CENTRAL PROCESSING UNIT WITH THE CAPABILITY TO SUPPORT COMMANDS OF VARIABLE LENGTH. | |
| GB1356997A (en) | Computer with programme tracing facility | |
| JPS57123462A (en) | Working analyzing circuit of data processor | |
| JPS5731049A (en) | Information processing equipment | |
| JPS55163697A (en) | Memory device | |
| JPS57139663A (en) | Method for recording running speed of vehicle | |
| JPS5523504A (en) | Message communication system in multi-processor | |
| JPS57193840A (en) | Data processing device | |
| JPS57189229A (en) | Recording and controlling system for career information | |
| JPS5699550A (en) | Information processing unit | |
| JPS56159747A (en) | Program testing device | |
| SU1298752A1 (en) | Device for debugging programs | |
| JPS5350813A (en) | Information memory device | |
| JPS56124199A (en) | Data processing device | |
| JPS55110357A (en) | Control system for recorder | |
| JPS5730045A (en) | List processor | |
| JPS5226131A (en) | Method of making out the operation control signal in microprograming c ontrol system computer | |
| JPS56127255A (en) | Automatic operating device | |
| JPS57183700A (en) | Information processor | |
| JPS57164351A (en) | Debugging device | |
| JPS5447446A (en) | Magnetic disc control unit | |
| JPS57208615A (en) | Writing controlling system of magnetic disk device | |
| JPS53124033A (en) | Bar code decision method | |
| JPS57206988A (en) | Data processor |