JPS576919A - Detecting circuit for faulty input pattern - Google Patents
Detecting circuit for faulty input patternInfo
- Publication number
- JPS576919A JPS576919A JP7981980A JP7981980A JPS576919A JP S576919 A JPS576919 A JP S576919A JP 7981980 A JP7981980 A JP 7981980A JP 7981980 A JP7981980 A JP 7981980A JP S576919 A JPS576919 A JP S576919A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- pattern
- input pattern
- fault
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
- G06F11/0763—Error or fault detection not based on redundancy by bit configuration check, e.g. of formats or tags
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Testing And Monitoring For Control Systems (AREA)
Abstract
PURPOSE:To realize a monitor for a fault of an input pattern with a small number of component parts, by connecting the binary signals to the priority encoders of two series with the sequence of array of the binary signals made inverse to each other and then using an output obtained via an adding circuit for a decision of fault. CONSTITUTION:The input signals, e.g. 1-8 of a pattern in which only a binary signal secures a signal presence state in the normal mode are supplied to an OR element 10, and at the same time connected to priority encoders 11 and 12 of two series in such way that the sequence of array of binary signals becomes adverse to each other. The outputs of these encoders are supplied to an adding circuit that consists of an adder circuit 13, an AND element 14 and a reverse element 15 and generates the output signal of a pattern which follows an addition of each digit. Then a normal or fualty state of the input pattern is decided according to a signal presence or signal absence state of an AND16 of the element 15 and the output signal of the OR element 10. As a result, the number of AND elements is reduced, and a fault of an input pattern comprising a number of input signals can be monitored with a small number of component parts.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7981980A JPS576919A (en) | 1980-06-13 | 1980-06-13 | Detecting circuit for faulty input pattern |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7981980A JPS576919A (en) | 1980-06-13 | 1980-06-13 | Detecting circuit for faulty input pattern |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS576919A true JPS576919A (en) | 1982-01-13 |
Family
ID=13700806
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7981980A Pending JPS576919A (en) | 1980-06-13 | 1980-06-13 | Detecting circuit for faulty input pattern |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS576919A (en) |
-
1980
- 1980-06-13 JP JP7981980A patent/JPS576919A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR880006612A (en) | Double computer | |
| JPS5483341A (en) | Digital integrated circuit | |
| WO1988001079A3 (en) | Signal processing | |
| JPS56156041A (en) | Multiplexer | |
| EP0238091A3 (en) | Logic circuit | |
| JPS576919A (en) | Detecting circuit for faulty input pattern | |
| IE812347L (en) | Electrocoating apparatus. | |
| JPS5713567A (en) | Multiprocessor system | |
| JPS5341969A (en) | Analogue signal selecting circuit | |
| SU788378A1 (en) | Device for checking "1 from n" code | |
| JPS5325347A (en) | State monitor unit for analog-digital converter | |
| JPS564957A (en) | Bus circuit | |
| JPS57139815A (en) | Fault diagnostic device | |
| JPS5566030A (en) | Package of fault detection capability | |
| JPS57111764A (en) | Count-up device | |
| JPS5715440A (en) | Semiconductor device | |
| JPS55123745A (en) | Logic integrated circuit easy to check | |
| JPS55124849A (en) | Error detection control system | |
| JPS5368065A (en) | Exclusive logical sum circuit | |
| JPS6474469A (en) | Multiplex assembly inspector | |
| JPS5639648A (en) | Information transmitter | |
| JPS5534741A (en) | Micro computer input circuit | |
| JPS6429023A (en) | Signal converter | |
| JPS55104126A (en) | Phase comparison circuit | |
| JPS5456350A (en) | Exclusive logical sum circuit |