JPS5761333A - Binary and decimal system conversion device - Google Patents

Binary and decimal system conversion device

Info

Publication number
JPS5761333A
JPS5761333A JP13657180A JP13657180A JPS5761333A JP S5761333 A JPS5761333 A JP S5761333A JP 13657180 A JP13657180 A JP 13657180A JP 13657180 A JP13657180 A JP 13657180A JP S5761333 A JPS5761333 A JP S5761333A
Authority
JP
Japan
Prior art keywords
binary data
bits
decimal
resistor
binary
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13657180A
Other languages
Japanese (ja)
Inventor
Hisao Nakajo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP13657180A priority Critical patent/JPS5761333A/en
Publication of JPS5761333A publication Critical patent/JPS5761333A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To perform conversion processing with high-speed when binary data are converted into decimal data, by taking out and processing the binary data by 4 bits.
CONSTITUTION: ADR (result of decimal data) resistor 106 is initialized by the output of a selector 107. While, binary data to be converted are stocked in a BR (binary data) resistor 101. Binary data stocked in the BR resistor 101 are taken out from the upper position of selection control of a selector 102 by 4 bits. The 0∼3 bits of BR resistor 101 are taken out. The binary data of these 4 bits are converted by the gate circuits 103 and 104, and becomes the input of a decimal adaptor D- ADD1 105 which performs decimal addition of 1 figure. At a result of this addition, the result of decimal addition of 4 bits and a carry signal are outputted.
COPYRIGHT: (C)1982,JPO&Japio
JP13657180A 1980-09-30 1980-09-30 Binary and decimal system conversion device Pending JPS5761333A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13657180A JPS5761333A (en) 1980-09-30 1980-09-30 Binary and decimal system conversion device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13657180A JPS5761333A (en) 1980-09-30 1980-09-30 Binary and decimal system conversion device

Publications (1)

Publication Number Publication Date
JPS5761333A true JPS5761333A (en) 1982-04-13

Family

ID=15178365

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13657180A Pending JPS5761333A (en) 1980-09-30 1980-09-30 Binary and decimal system conversion device

Country Status (1)

Country Link
JP (1) JPS5761333A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59177645A (en) * 1983-03-29 1984-10-08 Nec Corp Binary-decimal converting system
JPS60150135A (en) * 1983-09-30 1985-08-07 ハネイウエル・インフオ−メ−シヨン・システムス・インコ−ポレ−テツド Method and apparatus for converting binary format number to decimal format number
US8892615B2 (en) 2011-03-29 2014-11-18 Fujitsu Limited Arithmetic operation circuit and method of converting binary number

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59177645A (en) * 1983-03-29 1984-10-08 Nec Corp Binary-decimal converting system
JPS60150135A (en) * 1983-09-30 1985-08-07 ハネイウエル・インフオ−メ−シヨン・システムス・インコ−ポレ−テツド Method and apparatus for converting binary format number to decimal format number
US8892615B2 (en) 2011-03-29 2014-11-18 Fujitsu Limited Arithmetic operation circuit and method of converting binary number

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