JPS5760733A - Dynamic signal generating circuit - Google Patents

Dynamic signal generating circuit

Info

Publication number
JPS5760733A
JPS5760733A JP55134091A JP13409180A JPS5760733A JP S5760733 A JPS5760733 A JP S5760733A JP 55134091 A JP55134091 A JP 55134091A JP 13409180 A JP13409180 A JP 13409180A JP S5760733 A JPS5760733 A JP S5760733A
Authority
JP
Japan
Prior art keywords
signal
input
phi
leading edge
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55134091A
Other languages
Japanese (ja)
Inventor
Toru Furuyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP55134091A priority Critical patent/JPS5760733A/en
Priority to DE8181107500T priority patent/DE3174470D1/en
Priority to EP81107500A priority patent/EP0048922B1/en
Priority to US06/304,592 priority patent/US4472643A/en
Publication of JPS5760733A publication Critical patent/JPS5760733A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01Modifications for accelerating switching
    • H03K19/017Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
    • H03K19/01714Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits by bootstrapping, i.e. by positive feed-back

Abstract

PURPOSE:To generate a dynamic signal in a high speed with less power consumption, by boosting a clock signal input by a boosting circuit due to capacity coupling to generate a delayed clock signal output. CONSTITUTION:An output signal phi1 which rises in accordance with the leading edge of a clock signal phi input and becomes a floating state after a prescribed time and falls in accordance with the trailing edge of the signal phi input or the leading edge of a clock signal inversion phi input is supplied to a node N1 between the output line and the base input line of a TRT1. A signal output phi2 which rises at a prescibed time after the leading edge of the signal phi1 and falls in accordance with the leading edge of the signal inversion phi input or the trailing edge of the signal phi input is supplied to a node N2 between the output line and the base input line of a TRT2. Thus, a signal phid obtained by delaying the signal phi input is outputted from a node N3 between one end of a capacitor C and the drain of the TRT2.
JP55134091A 1980-09-26 1980-09-26 Dynamic signal generating circuit Pending JPS5760733A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP55134091A JPS5760733A (en) 1980-09-26 1980-09-26 Dynamic signal generating circuit
DE8181107500T DE3174470D1 (en) 1980-09-26 1981-09-21 Dynamic signal generation circuit
EP81107500A EP0048922B1 (en) 1980-09-26 1981-09-21 Dynamic signal generation circuit
US06/304,592 US4472643A (en) 1980-09-26 1981-09-22 Dynamic signal generation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55134091A JPS5760733A (en) 1980-09-26 1980-09-26 Dynamic signal generating circuit

Publications (1)

Publication Number Publication Date
JPS5760733A true JPS5760733A (en) 1982-04-12

Family

ID=15120210

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55134091A Pending JPS5760733A (en) 1980-09-26 1980-09-26 Dynamic signal generating circuit

Country Status (1)

Country Link
JP (1) JPS5760733A (en)

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