JPS5760423A - Data transfer system - Google Patents
Data transfer systemInfo
- Publication number
- JPS5760423A JPS5760423A JP13625980A JP13625980A JPS5760423A JP S5760423 A JPS5760423 A JP S5760423A JP 13625980 A JP13625980 A JP 13625980A JP 13625980 A JP13625980 A JP 13625980A JP S5760423 A JPS5760423 A JP S5760423A
- Authority
- JP
- Japan
- Prior art keywords
- data
- processing equipment
- area
- stack
- transfers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
- Information Transfer Systems (AREA)
Abstract
PURPOSE:To elevate data transfer efficiency, by providing a processing equipment for mainly controlling an I/O device, a processing equipment for mainly controlling a data transfer, and a data area which is used in common by said 2 processing equipment. CONSTITUTION:In case of a read transfer, a processor PC1 sets data to a buffer area B of a memory 2, sets a flag F of a status part S to ''0'', and after that, writes a read request signal to a request stack 9. A PC11 reads this signal, transfers the data of the area B to a data area D1 shown by a pointer part P, and after that, sets the flag F to 1'', also adds +1 to the pointer P, which is repeated until the areas D1, D2 are filled with a data. When the areas D1, D2 are filled with a data, the PC11 transfers the request signal in the stack 9 to a request stack 3. Also, the PC11 transfers the data of the area D1 to a register 14, and after that, outputs a request signal R to a processing equipment. When the signal R has been received, the processing equipment reads the data from the register 14, and informs to the PC11 of the end of read. The PC11 clears the contents of the stack 3.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13625980A JPS5760423A (en) | 1980-09-30 | 1980-09-30 | Data transfer system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13625980A JPS5760423A (en) | 1980-09-30 | 1980-09-30 | Data transfer system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5760423A true JPS5760423A (en) | 1982-04-12 |
Family
ID=15170995
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13625980A Pending JPS5760423A (en) | 1980-09-30 | 1980-09-30 | Data transfer system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5760423A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6333567A (en) * | 1986-07-26 | 1988-02-13 | Ulvac Corp | Cvd device |
-
1980
- 1980-09-30 JP JP13625980A patent/JPS5760423A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6333567A (en) * | 1986-07-26 | 1988-02-13 | Ulvac Corp | Cvd device |
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