JPS5757330A - Data transfer system by connection of bus - Google Patents
Data transfer system by connection of busInfo
- Publication number
- JPS5757330A JPS5757330A JP13236380A JP13236380A JPS5757330A JP S5757330 A JPS5757330 A JP S5757330A JP 13236380 A JP13236380 A JP 13236380A JP 13236380 A JP13236380 A JP 13236380A JP S5757330 A JPS5757330 A JP S5757330A
- Authority
- JP
- Japan
- Prior art keywords
- parts
- address
- clock
- series
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
- G06F13/423—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with synchronous protocol
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Small-Scale Networks (AREA)
- Information Transfer Systems (AREA)
Abstract
PURPOSE:To realize an economical data transfer system having the quanity of reduced hardware, by sending back the clock to a controller only through a terminal device that has coincidence betwen the received address and its own address among plural terminal devices which received the signals from the controller. CONSTITUTION:A control part 102 of a controller 100 edits the information given from a computer into a data, an address of a terminal device and a working command to send them to a parallel/series converting part 104, converts the information into a series data based on the sending timing given from a clock sending part 105, and then sends the series data and the clock given from the part 105 to terminal devices 200 and 300. The devices 200 and 300 receive the clocks through clock sending-back parts 202 and 302 and send them to series/parallel converting parts 201 and 301. The address of the received data is sent to starting parts 203 and 303, the working command is sent to working discrininating parts 204 and 304, and the data is sent to terminal parts 205 and 305 respectively through the parts 201 and 301. At the parts 203 and 303, the received address is collated with the own address. Then the terminal device is started when coincidence is obtained through the collation, and the clock is sent back to a series/parallel converting part 103 of the controller 100 via the part 105.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13236380A JPS6044712B2 (en) | 1980-09-25 | 1980-09-25 | Data transfer method using bus connection |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13236380A JPS6044712B2 (en) | 1980-09-25 | 1980-09-25 | Data transfer method using bus connection |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5757330A true JPS5757330A (en) | 1982-04-06 |
JPS6044712B2 JPS6044712B2 (en) | 1985-10-04 |
Family
ID=15079608
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13236380A Expired JPS6044712B2 (en) | 1980-09-25 | 1980-09-25 | Data transfer method using bus connection |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6044712B2 (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63202424A (en) * | 1987-02-13 | 1988-08-22 | 電気化学工業株式会社 | Plastic vessel |
JPH01126913U (en) * | 1988-02-10 | 1989-08-30 | ||
EP0397302A2 (en) * | 1989-05-12 | 1990-11-14 | Flavors Technology, Inc., | Synchronous bus |
US4999769A (en) * | 1987-08-20 | 1991-03-12 | International Business Machines Corporation | System with plural clocks for bidirectional information exchange between DMA controller and I/O devices via DMA bus |
US5648133A (en) * | 1990-10-05 | 1997-07-15 | Nissei Asb Machine Co., Ltd. | Biaxially oriented crystalline resin container and process of making the same |
-
1980
- 1980-09-25 JP JP13236380A patent/JPS6044712B2/en not_active Expired
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63202424A (en) * | 1987-02-13 | 1988-08-22 | 電気化学工業株式会社 | Plastic vessel |
JPH0558382B2 (en) * | 1987-02-13 | 1993-08-26 | Denki Kagaku Kogyo Kk | |
US4999769A (en) * | 1987-08-20 | 1991-03-12 | International Business Machines Corporation | System with plural clocks for bidirectional information exchange between DMA controller and I/O devices via DMA bus |
JPH01126913U (en) * | 1988-02-10 | 1989-08-30 | ||
EP0397302A2 (en) * | 1989-05-12 | 1990-11-14 | Flavors Technology, Inc., | Synchronous bus |
US5648133A (en) * | 1990-10-05 | 1997-07-15 | Nissei Asb Machine Co., Ltd. | Biaxially oriented crystalline resin container and process of making the same |
Also Published As
Publication number | Publication date |
---|---|
JPS6044712B2 (en) | 1985-10-04 |
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