JPS5690644A - Synchronization system - Google Patents

Synchronization system

Info

Publication number
JPS5690644A
JPS5690644A JP16752879A JP16752879A JPS5690644A JP S5690644 A JPS5690644 A JP S5690644A JP 16752879 A JP16752879 A JP 16752879A JP 16752879 A JP16752879 A JP 16752879A JP S5690644 A JPS5690644 A JP S5690644A
Authority
JP
Japan
Prior art keywords
circuit
output
slot
timing
synchronizing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16752879A
Other languages
Japanese (ja)
Other versions
JPS5915583B2 (en
Inventor
Shinsuke Yagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kokusai Electric Corp
Original Assignee
Kokusai Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kokusai Electric Corp filed Critical Kokusai Electric Corp
Priority to JP54167528A priority Critical patent/JPS5915583B2/en
Publication of JPS5690644A publication Critical patent/JPS5690644A/en
Publication of JPS5915583B2 publication Critical patent/JPS5915583B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Small-Scale Networks (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To improve the efficiency of whole system by correcting the delay time between a communication device and controller and by fixing a constant time position at slot timing to an input to the controller. CONSTITUTION:Data 1 from respective communication devices are mixed into one by synthesizing circuit 2, whose output 4 is resent to respective communication devices via output driver 3. Meanwhile, the output of circuit 2 is also supplied to synchronizing circuit 5 to detect a synchronizing code. The position of this synchronizing code, i.e. the output of circuit 5 is compared by timing difference detecting circuit 6 with slot timing clocks from generating circuits 7 and 8 for slots and frame clocks and the time differences are stored in timing difference memory 9, slot by slot. Output 13 sent from circuits 7 and 8 via timing control circuit 10, code generating circuit 11, etc., is controlled by the output of memory 9.
JP54167528A 1979-12-25 1979-12-25 Synchronization method for data transmission between multiple communication devices Expired JPS5915583B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54167528A JPS5915583B2 (en) 1979-12-25 1979-12-25 Synchronization method for data transmission between multiple communication devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54167528A JPS5915583B2 (en) 1979-12-25 1979-12-25 Synchronization method for data transmission between multiple communication devices

Publications (2)

Publication Number Publication Date
JPS5690644A true JPS5690644A (en) 1981-07-22
JPS5915583B2 JPS5915583B2 (en) 1984-04-10

Family

ID=15851358

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54167528A Expired JPS5915583B2 (en) 1979-12-25 1979-12-25 Synchronization method for data transmission between multiple communication devices

Country Status (1)

Country Link
JP (1) JPS5915583B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5879354A (en) * 1981-11-06 1983-05-13 Hitachi Ltd Synchronizing system
JPS60254352A (en) * 1984-05-31 1985-12-16 Fujitsu Ltd Synchronizing method of microprocessor in data transmission system
JPH01276849A (en) * 1988-04-28 1989-11-07 Matsushita Electric Ind Co Ltd Bus type time division multiplex transmitting method
JPH02292928A (en) * 1989-03-23 1990-12-04 Internatl Business Mach Corp <Ibm> Method for adjusting access of communication system

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61262194A (en) * 1985-05-16 1986-11-20 岩崎金属工業株式会社 Propelling pencil

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5879354A (en) * 1981-11-06 1983-05-13 Hitachi Ltd Synchronizing system
JPS60254352A (en) * 1984-05-31 1985-12-16 Fujitsu Ltd Synchronizing method of microprocessor in data transmission system
JPH01276849A (en) * 1988-04-28 1989-11-07 Matsushita Electric Ind Co Ltd Bus type time division multiplex transmitting method
JPH02292928A (en) * 1989-03-23 1990-12-04 Internatl Business Mach Corp <Ibm> Method for adjusting access of communication system
JPH0761077B2 (en) * 1989-03-23 1995-06-28 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン Method and apparatus for coordinating access in a communication system

Also Published As

Publication number Publication date
JPS5915583B2 (en) 1984-04-10

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