JPS5755450A - Producing system of multiple of four in binary coded decimal number - Google Patents

Producing system of multiple of four in binary coded decimal number

Info

Publication number
JPS5755450A
JPS5755450A JP55129586A JP12958680A JPS5755450A JP S5755450 A JPS5755450 A JP S5755450A JP 55129586 A JP55129586 A JP 55129586A JP 12958680 A JP12958680 A JP 12958680A JP S5755450 A JPS5755450 A JP S5755450A
Authority
JP
Japan
Prior art keywords
circuit
output
binary
digit
decimal number
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55129586A
Other languages
Japanese (ja)
Other versions
JPS6112286B2 (en
Inventor
Naofumi Yamada
Tomoatsu Yanagida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP55129586A priority Critical patent/JPS5755450A/en
Publication of JPS5755450A publication Critical patent/JPS5755450A/en
Publication of JPS6112286B2 publication Critical patent/JPS6112286B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/491—Computations with decimal numbers radix 12 or 20.
    • G06F7/4915—Multiplying; Dividing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)

Abstract

PURPOSE:To enable coding without reinforcing lower rank digits of each digit of input, by means of a coding circuit, through the provision of a circuit subtracting by six at the output side of a binary addition circuit. CONSTITUTION:A binary coded decimal number to be multiplied by four is stored to registers 1 and 2. The output of the register 1 is shifted by 2 bits to the upper rank digit with a shift circuit 3, and the output of the register 2 is coded to a 4-bit code with a specified rule independently of other digits for each digit of an input binary number with a coding circuit 8, and the output from the coding circuit 8 is shifted by 1 bit toward the upper rank digit with a shift circuit 5 and added to a binary addition circuit 6, respectively. The output of this binary addition circuit is inputted to a subtraction circuit which performs binary operation subtracting 6 from each digit of the output to obtain a multiple of four in binary coded decimal number.
JP55129586A 1980-09-18 1980-09-18 Producing system of multiple of four in binary coded decimal number Granted JPS5755450A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55129586A JPS5755450A (en) 1980-09-18 1980-09-18 Producing system of multiple of four in binary coded decimal number

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55129586A JPS5755450A (en) 1980-09-18 1980-09-18 Producing system of multiple of four in binary coded decimal number

Publications (2)

Publication Number Publication Date
JPS5755450A true JPS5755450A (en) 1982-04-02
JPS6112286B2 JPS6112286B2 (en) 1986-04-07

Family

ID=15013106

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55129586A Granted JPS5755450A (en) 1980-09-18 1980-09-18 Producing system of multiple of four in binary coded decimal number

Country Status (1)

Country Link
JP (1) JPS5755450A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63164287U (en) * 1987-04-16 1988-10-26

Also Published As

Publication number Publication date
JPS6112286B2 (en) 1986-04-07

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