JPS5752124A - Machining method for semiconductor wafer - Google Patents
Machining method for semiconductor waferInfo
- Publication number
- JPS5752124A JPS5752124A JP12809580A JP12809580A JPS5752124A JP S5752124 A JPS5752124 A JP S5752124A JP 12809580 A JP12809580 A JP 12809580A JP 12809580 A JP12809580 A JP 12809580A JP S5752124 A JPS5752124 A JP S5752124A
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- marking
- laser beam
- semiconductor wafer
- reduced
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
PURPOSE:To eliminate the raised part produced by the marking of a laser beam and adhered substances on a semiconductor wafer by marking the wafer with the laser beam before processing the wafer with a mirror polishing of final stage. CONSTITUTION:After a wafer obtained by slicing an ingot is lapped and etched, the surface of the wafer is marked by a laser beam, and is eventually mirror polished. The marking treatment may be performed before the lapping and etching treatments. In this manner, the raised part produced by the marking can be reduced in height to allowable limit, the machining hole of the marking can be reduced to the depth of the identifiable range, and the scattered adhered substances can be eliminated from the wafer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12809580A JPS5752124A (en) | 1980-09-16 | 1980-09-16 | Machining method for semiconductor wafer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12809580A JPS5752124A (en) | 1980-09-16 | 1980-09-16 | Machining method for semiconductor wafer |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5752124A true JPS5752124A (en) | 1982-03-27 |
Family
ID=14976266
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12809580A Pending JPS5752124A (en) | 1980-09-16 | 1980-09-16 | Machining method for semiconductor wafer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5752124A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5917235A (en) * | 1982-07-20 | 1984-01-28 | Nec Corp | Manufacture of semiconductor device |
WO2008151649A1 (en) | 2007-06-13 | 2008-12-18 | Conergy Ag | Method for marking wafers |
-
1980
- 1980-09-16 JP JP12809580A patent/JPS5752124A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5917235A (en) * | 1982-07-20 | 1984-01-28 | Nec Corp | Manufacture of semiconductor device |
WO2008151649A1 (en) | 2007-06-13 | 2008-12-18 | Conergy Ag | Method for marking wafers |
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