JPS5742163A - Charge transfer device - Google Patents

Charge transfer device

Info

Publication number
JPS5742163A
JPS5742163A JP11817480A JP11817480A JPS5742163A JP S5742163 A JPS5742163 A JP S5742163A JP 11817480 A JP11817480 A JP 11817480A JP 11817480 A JP11817480 A JP 11817480A JP S5742163 A JPS5742163 A JP S5742163A
Authority
JP
Japan
Prior art keywords
electrode
transfer
type
region
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11817480A
Other languages
Japanese (ja)
Other versions
JPS6032359B2 (en
Inventor
Hiroshige Goto
Koichi Sekine
Nobuo Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP11817480A priority Critical patent/JPS6032359B2/en
Publication of JPS5742163A publication Critical patent/JPS5742163A/en
Publication of JPS6032359B2 publication Critical patent/JPS6032359B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/762Charge transfer devices
    • H01L29/765Charge-coupled devices
    • H01L29/768Charge-coupled devices with field effect produced by an insulated gate
    • H01L29/76816Output structures

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

PURPOSE:To enable normal operation even at a high clock frequency with a quick transfer by reducing the transition period in the transfer of the charge to an output section from a final transfer electrode. CONSTITUTION:An insulation film 22 is applied on a p type Si substrate 21 and transfer electrodes 211-233, an output gate electrode 24 and a reset electrode 25 while a terminal 261 is connected to the electrodes 231 and 233 to apply a clock pulse phi1 and terminal 262 is to the electrode 232 to apply a clock pulse phi2. p<+> Type regions 271-273 are separately provided at parts of the substrate 21 positioned in part below the electrodes 231-233 to give the directivity in the charge transfer by generating an asymmetrical potential. An n<+> type floating region 28 is formed at a part of the substrate 21 on the side adjacent to an output gate electrode 24 of the electrode 25 or an n<+> type reset drain region 29 on the opposite side thereof. A source follower circuit 30 comprising a power source, an MOS type transistor 31 and load resistances 32 and 33 are connected to the region 28 and the power source is directly connected to the region 29.
JP11817480A 1980-08-27 1980-08-27 charge transfer device Expired JPS6032359B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11817480A JPS6032359B2 (en) 1980-08-27 1980-08-27 charge transfer device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11817480A JPS6032359B2 (en) 1980-08-27 1980-08-27 charge transfer device

Publications (2)

Publication Number Publication Date
JPS5742163A true JPS5742163A (en) 1982-03-09
JPS6032359B2 JPS6032359B2 (en) 1985-07-27

Family

ID=14729950

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11817480A Expired JPS6032359B2 (en) 1980-08-27 1980-08-27 charge transfer device

Country Status (1)

Country Link
JP (1) JPS6032359B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5455555A (en) * 1992-11-24 1995-10-03 Tdk Corporation Chip varistor
KR100259086B1 (en) * 1997-06-05 2000-06-15 김영환 Solid state image sensor and method for fabricating the same
US6563541B1 (en) 1997-07-01 2003-05-13 Nec Corporation Solid state image device with a vertical charge transfer portion

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5455555A (en) * 1992-11-24 1995-10-03 Tdk Corporation Chip varistor
KR100259086B1 (en) * 1997-06-05 2000-06-15 김영환 Solid state image sensor and method for fabricating the same
US6563541B1 (en) 1997-07-01 2003-05-13 Nec Corporation Solid state image device with a vertical charge transfer portion

Also Published As

Publication number Publication date
JPS6032359B2 (en) 1985-07-27

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