JPS5738997B2 - - Google Patents

Info

Publication number
JPS5738997B2
JPS5738997B2 JP14904074A JP14904074A JPS5738997B2 JP S5738997 B2 JPS5738997 B2 JP S5738997B2 JP 14904074 A JP14904074 A JP 14904074A JP 14904074 A JP14904074 A JP 14904074A JP S5738997 B2 JPS5738997 B2 JP S5738997B2
Authority
JP
Japan
Prior art keywords
bits
card
byte
recording
information bits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP14904074A
Other languages
English (en)
Other versions
JPS50118633A (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS50118633A publication Critical patent/JPS50118633A/ja
Publication of JPS5738997B2 publication Critical patent/JPS5738997B2/ja
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/1016—Error in accessing a memory location, i.e. addressing error
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/1032—Simple parity

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Static Random-Access Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Detection And Correction Of Errors (AREA)
  • Dram (AREA)
JP14904074A 1973-12-27 1974-12-27 Expired JPS5738997B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT32158/73A IT1002271B (it) 1973-12-27 1973-12-27 Perfezionamento ai dispositivi di controllo di parita nelle memorie a semiconduttori

Publications (2)

Publication Number Publication Date
JPS50118633A JPS50118633A (ja) 1975-09-17
JPS5738997B2 true JPS5738997B2 (ja) 1982-08-18

Family

ID=11234949

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14904074A Expired JPS5738997B2 (ja) 1973-12-27 1974-12-27

Country Status (4)

Country Link
US (1) US3972033A (ja)
JP (1) JPS5738997B2 (ja)
FR (1) FR2272466B1 (ja)
IT (1) IT1002271B (ja)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE387764B (sv) * 1975-09-16 1976-09-13 Ericsson Telefon Ab L M Sett att upptecka fel i en minnesanordning och kategoritillempningslogik for utforande av settet
US4037091A (en) * 1976-04-05 1977-07-19 Bell Telephone Laboratories, Incorporated Error correction circuit utilizing multiple parity bits
JPS5487439A (en) * 1977-12-23 1979-07-11 Fujitsu Ltd Error detection system of memory unit
JPS58105500A (ja) * 1981-11-23 1983-06-23 スペリ・コ−ポレ−シヨン メモリ駆動回路故障検出システム及び方法
US4464755A (en) * 1982-03-26 1984-08-07 Rca Corporation Memory system with error detection and correction
US4450562A (en) * 1982-03-26 1984-05-22 Rca Corporation Two level parity error correction system
US4472805A (en) * 1982-03-26 1984-09-18 Rca Corporation Memory system with error storage
US4727513A (en) * 1983-09-02 1988-02-23 Wang Laboratories, Inc. Signal in-line memory module
US4656605A (en) * 1983-09-02 1987-04-07 Wang Laboratories, Inc. Single in-line memory module
NL8400392A (nl) * 1984-02-08 1985-09-02 Philips Nv Inrichting voor de functiebewaking van een geheugeninrichting.
GB2179179B (en) * 1985-08-12 1989-10-18 British Gas Corp Improvements in or relating to burner control systems
ES2081820T3 (es) * 1988-08-02 1996-03-16 Siemens Ag Procedimiento para el aseguramiento contra errores en sistemas de memoria de instalaciones de proceso de datos, especialmente instalaciones de conmutacion telefonica.
WO2001022225A1 (de) * 1999-09-22 2001-03-29 Continental Teves Ag & Co. Ohg Verfahren und schaltungsanordnung zum speichern von datenworten in einem ram modul
JP4544901B2 (ja) * 2004-04-19 2010-09-15 株式会社日立製作所 記憶制御システム及びブート制御システム
US7284138B2 (en) * 2004-12-02 2007-10-16 International Business Machines Corporation Deep power saving by disabling clock distribution without separate clock distribution for power management logic
US20070050668A1 (en) * 2005-09-01 2007-03-01 Micron Technology, Inc. Test mode to force generation of all possible correction codes in an ECC memory
US7447948B2 (en) * 2005-11-21 2008-11-04 Intel Corporation ECC coding for high speed implementation
CN101453299A (zh) * 2007-12-07 2009-06-10 鸿富锦精密工业（深圳）有限公司 数据传输方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3761898A (en) * 1971-03-05 1973-09-25 Raytheon Co Random access memory
US3858187A (en) * 1974-01-11 1974-12-31 Gte Automatic Electric Lab Inc Read only memory system

Also Published As

Publication number Publication date
FR2272466A1 (ja) 1975-12-19
FR2272466B1 (ja) 1978-07-13
JPS50118633A (ja) 1975-09-17
US3972033A (en) 1976-07-27
IT1002271B (it) 1976-05-20

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