JPS5726452A - Testing method for semiconductor device - Google Patents

Testing method for semiconductor device

Info

Publication number
JPS5726452A
JPS5726452A JP10200280A JP10200280A JPS5726452A JP S5726452 A JPS5726452 A JP S5726452A JP 10200280 A JP10200280 A JP 10200280A JP 10200280 A JP10200280 A JP 10200280A JP S5726452 A JPS5726452 A JP S5726452A
Authority
JP
Japan
Prior art keywords
moisture resistance
wafer
substrate
test
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10200280A
Other languages
Japanese (ja)
Inventor
Hirota Makino
Kiyoshi Iwamori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP10200280A priority Critical patent/JPS5726452A/en
Publication of JPS5726452A publication Critical patent/JPS5726452A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE:To shorten the evaluating time of a semiconductor device by enabling the evaluation of the moisture resistance of the device as required as a wafer. CONSTITUTION:A wire 7 and a bias applying lead 8 are provided at a semiconductor wafer 6. The wafer 6 is mounted on a substrate, and the lead 8 is connected to a substrate terminal 9. The substrate is introduced into a furnace, the wafer 6 is exposed to high temperature and bias is applied from a lead wire 4 to perform an objective moisture resistance evaluation test. Since the test can be performed irrespective of the factors in the assembling step to the moisture resistance test according to this configuration and no resin sealing is necessary, the moisture resistance test only for the chip can be completed in a short time.
JP10200280A 1980-07-24 1980-07-24 Testing method for semiconductor device Pending JPS5726452A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10200280A JPS5726452A (en) 1980-07-24 1980-07-24 Testing method for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10200280A JPS5726452A (en) 1980-07-24 1980-07-24 Testing method for semiconductor device

Publications (1)

Publication Number Publication Date
JPS5726452A true JPS5726452A (en) 1982-02-12

Family

ID=14315582

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10200280A Pending JPS5726452A (en) 1980-07-24 1980-07-24 Testing method for semiconductor device

Country Status (1)

Country Link
JP (1) JPS5726452A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61121451A (en) * 1984-11-19 1986-06-09 Nec Corp Testing process of semiconductor device
JPS6291026A (en) * 1985-10-17 1987-04-25 Nec Corp Mobile communication system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61121451A (en) * 1984-11-19 1986-06-09 Nec Corp Testing process of semiconductor device
JPS6291026A (en) * 1985-10-17 1987-04-25 Nec Corp Mobile communication system

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