JPS5721814A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5721814A
JPS5721814A JP9670180A JP9670180A JPS5721814A JP S5721814 A JPS5721814 A JP S5721814A JP 9670180 A JP9670180 A JP 9670180A JP 9670180 A JP9670180 A JP 9670180A JP S5721814 A JPS5721814 A JP S5721814A
Authority
JP
Japan
Prior art keywords
layer
single crystal
film
epitaxially grown
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9670180A
Other languages
Japanese (ja)
Inventor
Yoshiaki Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP9670180A priority Critical patent/JPS5721814A/en
Publication of JPS5721814A publication Critical patent/JPS5721814A/en
Pending legal-status Critical Current

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  • Recrystallisation Techniques (AREA)

Abstract

PURPOSE: To prevent the automatic doping in a growing step by forming a polycrystalline semiconductor layer on the surface of a single crystal semiconductor substrate formed with a high density impurity region, annealing it to form a single crystal region, and then forming an epitaxially grown layer.
CONSTITUTION: A polycrystalline silicon film 7 having 0.1μm of thickness if formed on the surface of a P-type silicon substrate 5 formed with a doped layer 6 in high density N-type impurity. The film 7 is formed, for example, at 650°C, 0.2W0.3 Torr by a reduced pressure CVD method. After the film 7 is converted to single crystal silicon layer 8 by a laser annealing method, and N-type single crystal silicon 9 having 2μm of thickness is epitaxially grown. Since the layer 6 is not exposed at the epitaxially growint time in this manner, it can prevent the automatic doping to the epitaxially grown layer.
COPYRIGHT: (C)1982,JPO&Japio
JP9670180A 1980-07-15 1980-07-15 Manufacture of semiconductor device Pending JPS5721814A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9670180A JPS5721814A (en) 1980-07-15 1980-07-15 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9670180A JPS5721814A (en) 1980-07-15 1980-07-15 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5721814A true JPS5721814A (en) 1982-02-04

Family

ID=14172058

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9670180A Pending JPS5721814A (en) 1980-07-15 1980-07-15 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5721814A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5112773A (en) * 1991-04-10 1992-05-12 Micron Technology, Inc. Methods for texturizing polysilicon utilizing gas phase nucleation

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5112773A (en) * 1991-04-10 1992-05-12 Micron Technology, Inc. Methods for texturizing polysilicon utilizing gas phase nucleation

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