JPS57203151A - History storage system of logical device - Google Patents
History storage system of logical deviceInfo
- Publication number
- JPS57203151A JPS57203151A JP56089171A JP8917181A JPS57203151A JP S57203151 A JPS57203151 A JP S57203151A JP 56089171 A JP56089171 A JP 56089171A JP 8917181 A JP8917181 A JP 8917181A JP S57203151 A JPS57203151 A JP S57203151A
- Authority
- JP
- Japan
- Prior art keywords
- instruction
- address
- instruction code
- stored
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
Abstract
PURPOSE:To reduce erroneous processing due to a difference between an instruction address and an instruction code by storing a couple of the instruction address and instruction code in adjacent addresses by a history storage system which achieves circulating storage. CONSTITUTION:An instruction of a logical device 1 has one instruction cycle Lop consisting normally of several machine cycles i0-i4, so when some instruction is executed, an instruction address signal is selected and sent out in the starting machine cycle i0, and is stored in the address #n of a storage device 7. In the next machine cycle i1, an instruction code signal 12 is selected and stored in the address #n+1. Thus, a couple of the instruction address signal 11 and instruction code signal 12 having a correlation with respect to history information are stored in adjacent addresses of the storage circuit 7, and consequently pieces of analysis information are obtained from invariably adjacent addresses during an analysis of a fault such as malfunction, thereby reducing erroneous processing whose cause is unclear due to a difference between the instruction address and instruction code.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56089171A JPS57203151A (en) | 1981-06-10 | 1981-06-10 | History storage system of logical device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56089171A JPS57203151A (en) | 1981-06-10 | 1981-06-10 | History storage system of logical device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57203151A true JPS57203151A (en) | 1982-12-13 |
Family
ID=13963340
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56089171A Pending JPS57203151A (en) | 1981-06-10 | 1981-06-10 | History storage system of logical device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57203151A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61168055A (en) * | 1985-01-22 | 1986-07-29 | Nec Corp | Information processor |
-
1981
- 1981-06-10 JP JP56089171A patent/JPS57203151A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61168055A (en) * | 1985-01-22 | 1986-07-29 | Nec Corp | Information processor |
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