JPS57196618A - Phase comparison circuit - Google Patents
Phase comparison circuitInfo
- Publication number
- JPS57196618A JPS57196618A JP56081003A JP8100381A JPS57196618A JP S57196618 A JPS57196618 A JP S57196618A JP 56081003 A JP56081003 A JP 56081003A JP 8100381 A JP8100381 A JP 8100381A JP S57196618 A JPS57196618 A JP S57196618A
- Authority
- JP
- Japan
- Prior art keywords
- output
- gate
- signal
- phase difference
- phase
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
- H03K5/26—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being duration, interval, position, frequency, or sequence
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Feedback Control In General (AREA)
- Manipulation Of Pulses (AREA)
Abstract
PURPOSE:To synchronize a reference signal with a control signal on a tape, by the phase comparison between two signals with different frequencies so that the phase difference can be detected by taking a lower frequency signal as a center. CONSTITUTION:An output of an NAND gate 6 is fed back to an input of an NAND gate 7 and an output of the gate 7 is to the input of the gate 6 respectively. A low-pass filter 2 is connected to the gate 7. If a period from the leading of a reference signal B to the trailing of a comparison signal A coming next is T2, an output C of a phase difference detector 1 has a period of T and T1+ T2 of positive pulse width. An output D of the filter 2 is a DC voltage with amplitude of VcX(T1+T2)/T to the amplitude Vc of the signal C. Since the output D changes with the phase difference T2 between the signals B and A, the driving control of a motor with the output D allows a prescribed phase to be fixed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56081003A JPS57196618A (en) | 1981-05-29 | 1981-05-29 | Phase comparison circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56081003A JPS57196618A (en) | 1981-05-29 | 1981-05-29 | Phase comparison circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57196618A true JPS57196618A (en) | 1982-12-02 |
Family
ID=13734339
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56081003A Pending JPS57196618A (en) | 1981-05-29 | 1981-05-29 | Phase comparison circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57196618A (en) |
-
1981
- 1981-05-29 JP JP56081003A patent/JPS57196618A/en active Pending
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