JPS57193841A - Program counter circuit - Google Patents

Program counter circuit

Info

Publication number
JPS57193841A
JPS57193841A JP7657881A JP7657881A JPS57193841A JP S57193841 A JPS57193841 A JP S57193841A JP 7657881 A JP7657881 A JP 7657881A JP 7657881 A JP7657881 A JP 7657881A JP S57193841 A JPS57193841 A JP S57193841A
Authority
JP
Japan
Prior art keywords
page
constant
branching
instruction
counter circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7657881A
Other languages
Japanese (ja)
Inventor
Satoshi Michishita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP7657881A priority Critical patent/JPS57193841A/en
Publication of JPS57193841A publication Critical patent/JPS57193841A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/3005Arrangements for executing specific machine instructions to perform operations for flow control
    • G06F9/30054Unconditional branch instructions

Abstract

PURPOSE:To reduce the number of steps of a branch instruction, by adding a constant addition//subtraction circuit to a page section register. CONSTITUTION:A page section register 1 is provided with a constant addition// subtraction circuit 4 to add or subtract a constant K. When the constant K=1, the step is branched to an address A1 of a page(P+1) adding (1) to a page P0, which is under execution at present with a BRI(A1) and branched to an address A2 of a page(P-1) subtracting (1) from a page P0 is under execution at present time with a BRD(A2). Further, by grouping the program, branching in the group can almost be executed with the BRI and BRD. The branching method by an LDP instruction and a BR instruction are only used for the branching between groups.
JP7657881A 1981-05-22 1981-05-22 Program counter circuit Pending JPS57193841A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7657881A JPS57193841A (en) 1981-05-22 1981-05-22 Program counter circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7657881A JPS57193841A (en) 1981-05-22 1981-05-22 Program counter circuit

Publications (1)

Publication Number Publication Date
JPS57193841A true JPS57193841A (en) 1982-11-29

Family

ID=13609139

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7657881A Pending JPS57193841A (en) 1981-05-22 1981-05-22 Program counter circuit

Country Status (1)

Country Link
JP (1) JPS57193841A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5911451A (en) * 1982-07-13 1984-01-21 Nec Corp Branch controlling system
JPS60211590A (en) * 1984-04-06 1985-10-23 Fujitsu Ten Ltd Counting method utilizing memory
JPS6446834A (en) * 1987-03-27 1989-02-21 Tandem Computers Inc Generator for address and branch target address

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55103653A (en) * 1979-01-31 1980-08-08 Nec Corp Data processing unit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55103653A (en) * 1979-01-31 1980-08-08 Nec Corp Data processing unit

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5911451A (en) * 1982-07-13 1984-01-21 Nec Corp Branch controlling system
JPS631622B2 (en) * 1982-07-13 1988-01-13 Nippon Electric Co
JPS60211590A (en) * 1984-04-06 1985-10-23 Fujitsu Ten Ltd Counting method utilizing memory
JPH026250B2 (en) * 1984-04-06 1990-02-08 Fujitsu Ten Ltd
JPS6446834A (en) * 1987-03-27 1989-02-21 Tandem Computers Inc Generator for address and branch target address

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