JPS57189261A - Data processing device - Google Patents

Data processing device

Info

Publication number
JPS57189261A
JPS57189261A JP7353681A JP7353681A JPS57189261A JP S57189261 A JPS57189261 A JP S57189261A JP 7353681 A JP7353681 A JP 7353681A JP 7353681 A JP7353681 A JP 7353681A JP S57189261 A JPS57189261 A JP S57189261A
Authority
JP
Japan
Prior art keywords
instruction
sub
units
signal
main control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7353681A
Other languages
Japanese (ja)
Inventor
Kenichiro Oda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP7353681A priority Critical patent/JPS57189261A/en
Publication of JPS57189261A publication Critical patent/JPS57189261A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3867Concurrent instruction execution, e.g. pipeline, look ahead using instruction pipelines
    • G06F9/3869Implementation aspects, e.g. pipeline latches; pipeline synchronisation and clocking

Abstract

PURPOSE:To improve the processing capability through the addition of sub- units in different speed, by making report in matching with an instruction completion signal of the sub-unit having the slowest processing speed, in a device processing the result of instruction from the sub-units. CONSTITUTION:An instruction 25 from a main control unit 1 is decoded, a register 9 is selectively outputted at an interface control work fetching register readout control circuit 10 and signals 18-20 are formed. Simultaneously, instruction completion signals 21-23 are formed, they are ANDed at an AND circuit 11 to be an instruction completion signal 24 and applied to a main control unit 1. When the main control unit 1 receives the signal 24, the unit 1 fetches the outputs 18-20 from sub-units 5-7. Thus, the time between the instruction completion signal 24 is outputted and the issue of instruction is dependent on the slowest processing speed signal.
JP7353681A 1981-05-18 1981-05-18 Data processing device Pending JPS57189261A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7353681A JPS57189261A (en) 1981-05-18 1981-05-18 Data processing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7353681A JPS57189261A (en) 1981-05-18 1981-05-18 Data processing device

Publications (1)

Publication Number Publication Date
JPS57189261A true JPS57189261A (en) 1982-11-20

Family

ID=13521043

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7353681A Pending JPS57189261A (en) 1981-05-18 1981-05-18 Data processing device

Country Status (1)

Country Link
JP (1) JPS57189261A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61110238A (en) * 1984-10-31 1986-05-28 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション Microprogram type parallel processor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61110238A (en) * 1984-10-31 1986-05-28 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション Microprogram type parallel processor
JPS6329292B2 (en) * 1984-10-31 1988-06-13 Intaanashonaru Bijinesu Mashiinzu Corp

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