JPS56137444A - Data processing controller - Google Patents

Data processing controller

Info

Publication number
JPS56137444A
JPS56137444A JP4022180A JP4022180A JPS56137444A JP S56137444 A JPS56137444 A JP S56137444A JP 4022180 A JP4022180 A JP 4022180A JP 4022180 A JP4022180 A JP 4022180A JP S56137444 A JPS56137444 A JP S56137444A
Authority
JP
Japan
Prior art keywords
signal
mux24
register
data
abus3a
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4022180A
Other languages
Japanese (ja)
Inventor
Tsutomu Sakamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP4022180A priority Critical patent/JPS56137444A/en
Publication of JPS56137444A publication Critical patent/JPS56137444A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/223—Execution means for microinstructions irrespective of the microinstruction function, e.g. decoding of microinstructions and nanoinstructions; timing of microinstructions; programmable logic arrays; delays and fan-out problems

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To confirm the control signal and to make high speed processing of the device, by fetching the data to be processed to the logic operation device and outputting nano instruction. CONSTITUTION:When the module start signal is risen, clear signal is generated with the clock signal to initialize the program ROM data register NRDR22. Then, the output signal of the register 22 and the mode signals M0, M1 of the multiplexer MUX24 are both 0 and ABUS3A is selected. At the microinstruction start point, MUX24 selects ABUS3A without fail, and data is fetched to the logic operation device ALU25 via MUX24. After that, the nano instruction is fetched to the register 22 at the leading of clock at the strobe signal PLL real time, and the control signal of constituting element of the operator 2 is confirmed and the high speed processing of the device can be made.
JP4022180A 1980-03-31 1980-03-31 Data processing controller Pending JPS56137444A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4022180A JPS56137444A (en) 1980-03-31 1980-03-31 Data processing controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4022180A JPS56137444A (en) 1980-03-31 1980-03-31 Data processing controller

Publications (1)

Publication Number Publication Date
JPS56137444A true JPS56137444A (en) 1981-10-27

Family

ID=12574700

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4022180A Pending JPS56137444A (en) 1980-03-31 1980-03-31 Data processing controller

Country Status (1)

Country Link
JP (1) JPS56137444A (en)

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