JPS57186296A - Memory controlling circuit - Google Patents
Memory controlling circuitInfo
- Publication number
- JPS57186296A JPS57186296A JP56070743A JP7074381A JPS57186296A JP S57186296 A JPS57186296 A JP S57186296A JP 56070743 A JP56070743 A JP 56070743A JP 7074381 A JP7074381 A JP 7074381A JP S57186296 A JPS57186296 A JP S57186296A
- Authority
- JP
- Japan
- Prior art keywords
- ram
- power source
- transistor
- same time
- bar
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/141—Battery and back-up supplies
Abstract
PURPOSE:To reduce the power consumption of the titled circuit, by installing a selecting circuit to a terminal which switches an RAM between the waiting condition and normally operating condition. CONSTITUTION:The power source terminal VCC of a CMOS-RAM is connected to a system power source VCCS through a diode D2 and, at the same time, also connected to a battery power source BT through another diode D1. Moreover, the system power source VCCS is connected to the base of an NPN transistor through resistances R1 and R2. The power source terminal VCC of the RAM is further connected to the collector of the transistor through a resistance R0, and, at the same time, also connected to a tip select terminal bar CS of the RAM. The emitter of the transistor is connected to an address deocoder (not shown in the diagram) and performs tip selection on the RAM. The emitter supplies an electric power to the RAM through the diodes D1 and D2 in accordance with the (1) or (0) of the bar CS.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56070743A JPS57186296A (en) | 1981-05-13 | 1981-05-13 | Memory controlling circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56070743A JPS57186296A (en) | 1981-05-13 | 1981-05-13 | Memory controlling circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57186296A true JPS57186296A (en) | 1982-11-16 |
Family
ID=13440292
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56070743A Pending JPS57186296A (en) | 1981-05-13 | 1981-05-13 | Memory controlling circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57186296A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6032469A (en) * | 1983-08-02 | 1985-02-19 | Murata Giken Kk | Receiving paper discharge device in facsimile |
JPS60109131U (en) * | 1983-12-27 | 1985-07-24 | 株式会社東芝 | Random access memory protection circuit |
JPS6364693A (en) * | 1986-09-04 | 1988-03-23 | Alps Electric Co Ltd | Battery backup circuit for static ram |
-
1981
- 1981-05-13 JP JP56070743A patent/JPS57186296A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6032469A (en) * | 1983-08-02 | 1985-02-19 | Murata Giken Kk | Receiving paper discharge device in facsimile |
JPH0510862B2 (en) * | 1983-08-02 | 1993-02-10 | Murata Machinery Ltd | |
JPS60109131U (en) * | 1983-12-27 | 1985-07-24 | 株式会社東芝 | Random access memory protection circuit |
JPS6364693A (en) * | 1986-09-04 | 1988-03-23 | Alps Electric Co Ltd | Battery backup circuit for static ram |
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