JPS57177530A - Processing of semiconductor wafer - Google Patents
Processing of semiconductor waferInfo
- Publication number
- JPS57177530A JPS57177530A JP6246181A JP6246181A JPS57177530A JP S57177530 A JPS57177530 A JP S57177530A JP 6246181 A JP6246181 A JP 6246181A JP 6246181 A JP6246181 A JP 6246181A JP S57177530 A JPS57177530 A JP S57177530A
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- crystal defect
- constitution
- damage
- defect
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 230000007547 defect Effects 0.000 abstract 5
- 239000013078 crystal Substances 0.000 abstract 4
- 238000010438 heat treatment Methods 0.000 abstract 2
- 238000000034 method Methods 0.000 abstract 2
- 239000002344 surface layer Substances 0.000 abstract 2
- 230000001627 detrimental effect Effects 0.000 abstract 1
- 239000012535 impurity Substances 0.000 abstract 1
- 238000010884 ion-beam technique Methods 0.000 abstract 1
- 230000001678 irradiating effect Effects 0.000 abstract 1
- 230000008646 thermal stress Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6246181A JPS57177530A (en) | 1981-04-27 | 1981-04-27 | Processing of semiconductor wafer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6246181A JPS57177530A (en) | 1981-04-27 | 1981-04-27 | Processing of semiconductor wafer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS57177530A true JPS57177530A (en) | 1982-11-01 |
Family
ID=13200861
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6246181A Pending JPS57177530A (en) | 1981-04-27 | 1981-04-27 | Processing of semiconductor wafer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57177530A (ja) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4885257A (en) * | 1983-07-29 | 1989-12-05 | Kabushiki Kaisha Toshiba | Gettering process with multi-step annealing and inert ion implantation |
| US5098852A (en) * | 1989-07-05 | 1992-03-24 | Kabushiki Kaisha Toshiba | Method of manufacturing a semiconductor device by mega-electron volt ion implantation |
| US5635414A (en) * | 1995-03-28 | 1997-06-03 | Zakaluk; Gregory | Low cost method of fabricating shallow junction, Schottky semiconductor devices |
| JP2015023039A (ja) * | 2013-07-16 | 2015-02-02 | 住友重機械工業株式会社 | 半導体装置の製造方法及び製造装置 |
| JP2015095534A (ja) * | 2013-11-12 | 2015-05-18 | 住友重機械工業株式会社 | 半導体装置の製造方法及び半導体製造装置 |
-
1981
- 1981-04-27 JP JP6246181A patent/JPS57177530A/ja active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4885257A (en) * | 1983-07-29 | 1989-12-05 | Kabushiki Kaisha Toshiba | Gettering process with multi-step annealing and inert ion implantation |
| US5098852A (en) * | 1989-07-05 | 1992-03-24 | Kabushiki Kaisha Toshiba | Method of manufacturing a semiconductor device by mega-electron volt ion implantation |
| US5635414A (en) * | 1995-03-28 | 1997-06-03 | Zakaluk; Gregory | Low cost method of fabricating shallow junction, Schottky semiconductor devices |
| JP2015023039A (ja) * | 2013-07-16 | 2015-02-02 | 住友重機械工業株式会社 | 半導体装置の製造方法及び製造装置 |
| JP2015095534A (ja) * | 2013-11-12 | 2015-05-18 | 住友重機械工業株式会社 | 半導体装置の製造方法及び半導体製造装置 |
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