JPS57173227A - Delay circuit - Google Patents

Delay circuit

Info

Publication number
JPS57173227A
JPS57173227A JP5816681A JP5816681A JPS57173227A JP S57173227 A JPS57173227 A JP S57173227A JP 5816681 A JP5816681 A JP 5816681A JP 5816681 A JP5816681 A JP 5816681A JP S57173227 A JPS57173227 A JP S57173227A
Authority
JP
Japan
Prior art keywords
put40
capacitor
voltage
turns
load
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5816681A
Other languages
Japanese (ja)
Other versions
JPS6159011B2 (en
Inventor
Kiyotoshi Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP5816681A priority Critical patent/JPS57173227A/en
Publication of JPS57173227A publication Critical patent/JPS57173227A/en
Publication of JPS6159011B2 publication Critical patent/JPS6159011B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/28—Modifications for introducing a time delay before switching
    • H03K17/292—Modifications for introducing a time delay before switching in thyristor, unijunction transistor or programmable unijunction transistor switches

Landscapes

  • Control Of Positive-Displacement Pumps (AREA)
  • Electronic Switches (AREA)

Abstract

PURPOSE:To obtain a circuit tolerant to a high-voltage noise by obtaining a period when a load is not powered up for a certain time when a power source is put to work again, by using a PUT. CONSTITUTION:When a switch 4 is closed to supply electric power, a PUT40 turns on and a transistor (TR) 27 turns on to power up a load 30. At this time, a capacitor 17 is charged via a route of a diode 34, a resistance 35, a capacitor, a diode 41, and the TR27. When the switch 4 is turned on and turned off immediately, the PUT40 is still off and the charging voltage of the capacitor 17 is applied to the gate of the PUT40 by being superposed upon a power voltage, so the PUT40 holds itself off. When the capacitor 17 is discharged and the gate voltage of the PUT40 drops below its anode voltage, the PUT40 turns on to supply electric power to the load 30.
JP5816681A 1981-04-17 1981-04-17 Delay circuit Granted JPS57173227A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5816681A JPS57173227A (en) 1981-04-17 1981-04-17 Delay circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5816681A JPS57173227A (en) 1981-04-17 1981-04-17 Delay circuit

Publications (2)

Publication Number Publication Date
JPS57173227A true JPS57173227A (en) 1982-10-25
JPS6159011B2 JPS6159011B2 (en) 1986-12-15

Family

ID=13076403

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5816681A Granted JPS57173227A (en) 1981-04-17 1981-04-17 Delay circuit

Country Status (1)

Country Link
JP (1) JPS57173227A (en)

Also Published As

Publication number Publication date
JPS6159011B2 (en) 1986-12-15

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