JPS57171807A - Multifrequency generating circuit - Google Patents

Multifrequency generating circuit

Info

Publication number
JPS57171807A
JPS57171807A JP5748881A JP5748881A JPS57171807A JP S57171807 A JPS57171807 A JP S57171807A JP 5748881 A JP5748881 A JP 5748881A JP 5748881 A JP5748881 A JP 5748881A JP S57171807 A JPS57171807 A JP S57171807A
Authority
JP
Japan
Prior art keywords
circuit
frequencies
output
sampling
constitution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5748881A
Other languages
Japanese (ja)
Inventor
Hiroshi Tsurumaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP5748881A priority Critical patent/JPS57171807A/en
Publication of JPS57171807A publication Critical patent/JPS57171807A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To output signals having necessary frequencies at the same time and in quantities stably by storing PCM data obtained by sampling sine waves having different frequencies at the same sampling timing, and succesively reading them synchronously with clock pulses.
CONSTITUTION: An address generating circuit 10 is connected to an input terminal 9, and a latch specifying circuit 11 and an encoded-sine-wave storage circuit 12 are connected to the circuit 10 respectively. Latch circuits 131∼13n are connected to the circuit 12, and the output of the circuit 11 is led to the circuits 131∼13n. Digital outputs are DA-converted at parts 141∼14n, whose outputs are led to output terminals 161∼16n through LPFs 151∼15n. In the circuit 12, PCM data obtained by sampling sine waves having frequencies f1∼fn at the same timing are stored respectively. In this constitution, the output signal of a main oscillator is supplied to the terminal 9 to output waveform-shaped signals having frequencies f1∼fn at the same time.
COPYRIGHT: (C)1982,JPO&Japio
JP5748881A 1981-04-15 1981-04-15 Multifrequency generating circuit Pending JPS57171807A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5748881A JPS57171807A (en) 1981-04-15 1981-04-15 Multifrequency generating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5748881A JPS57171807A (en) 1981-04-15 1981-04-15 Multifrequency generating circuit

Publications (1)

Publication Number Publication Date
JPS57171807A true JPS57171807A (en) 1982-10-22

Family

ID=13057097

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5748881A Pending JPS57171807A (en) 1981-04-15 1981-04-15 Multifrequency generating circuit

Country Status (1)

Country Link
JP (1) JPS57171807A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5590128A (en) * 1978-12-27 1980-07-08 Hitachi Ltd Variable phase signal generator

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5590128A (en) * 1978-12-27 1980-07-08 Hitachi Ltd Variable phase signal generator

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