JPS57162352A - Manufacture of resin-sealed semiconductor device - Google Patents

Manufacture of resin-sealed semiconductor device

Info

Publication number
JPS57162352A
JPS57162352A JP56047057A JP4705781A JPS57162352A JP S57162352 A JPS57162352 A JP S57162352A JP 56047057 A JP56047057 A JP 56047057A JP 4705781 A JP4705781 A JP 4705781A JP S57162352 A JPS57162352 A JP S57162352A
Authority
JP
Japan
Prior art keywords
resin
chip
cavity
resin unit
manufacture
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56047057A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6142428B2 (enrdf_load_stackoverflow
Inventor
Hideo Tanaka
Kiyoshi Kakiya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56047057A priority Critical patent/JPS57162352A/ja
Publication of JPS57162352A publication Critical patent/JPS57162352A/ja
Publication of JPS6142428B2 publication Critical patent/JPS6142428B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/18Circuits for erasing optically
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/1815Shape

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP56047057A 1981-03-30 1981-03-30 Manufacture of resin-sealed semiconductor device Granted JPS57162352A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56047057A JPS57162352A (en) 1981-03-30 1981-03-30 Manufacture of resin-sealed semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56047057A JPS57162352A (en) 1981-03-30 1981-03-30 Manufacture of resin-sealed semiconductor device

Publications (2)

Publication Number Publication Date
JPS57162352A true JPS57162352A (en) 1982-10-06
JPS6142428B2 JPS6142428B2 (enrdf_load_stackoverflow) 1986-09-20

Family

ID=12764521

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56047057A Granted JPS57162352A (en) 1981-03-30 1981-03-30 Manufacture of resin-sealed semiconductor device

Country Status (1)

Country Link
JP (1) JPS57162352A (enrdf_load_stackoverflow)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61156249U (enrdf_load_stackoverflow) * 1985-03-18 1986-09-27
US4766095A (en) * 1985-01-04 1988-08-23 Oki Electric Industry Co., Ltd. Method of manufacturing eprom device
US5026667A (en) * 1987-12-29 1991-06-25 Analog Devices, Incorporated Producing integrated circuit chips with reduced stress effects
US6165816A (en) * 1996-06-13 2000-12-26 Nikko Company Fabrication of electronic components having a hollow package structure with a ceramic lid
JP2009267272A (ja) * 2008-04-29 2009-11-12 New Japan Radio Co Ltd 半導体中空パッケージ及びその製造方法
JP2010062232A (ja) * 2008-09-02 2010-03-18 Nec Electronics Corp 素子の機能部を露出させた半導体装置の製造方法
US8044411B2 (en) 2002-12-13 2011-10-25 Semiconductor Energy Laboratory Co., Ltd. Light emitting device

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4766095A (en) * 1985-01-04 1988-08-23 Oki Electric Industry Co., Ltd. Method of manufacturing eprom device
JPS61156249U (enrdf_load_stackoverflow) * 1985-03-18 1986-09-27
US5026667A (en) * 1987-12-29 1991-06-25 Analog Devices, Incorporated Producing integrated circuit chips with reduced stress effects
US6165816A (en) * 1996-06-13 2000-12-26 Nikko Company Fabrication of electronic components having a hollow package structure with a ceramic lid
US8044411B2 (en) 2002-12-13 2011-10-25 Semiconductor Energy Laboratory Co., Ltd. Light emitting device
US8237176B2 (en) 2002-12-13 2012-08-07 Semiconductor Energy Laboratory Co., Ltd. Light emitting device
US8482011B2 (en) 2002-12-13 2013-07-09 Semiconductor Energy Laboratory Co., Ltd. Light-emitting device
JP2009267272A (ja) * 2008-04-29 2009-11-12 New Japan Radio Co Ltd 半導体中空パッケージ及びその製造方法
JP2010062232A (ja) * 2008-09-02 2010-03-18 Nec Electronics Corp 素子の機能部を露出させた半導体装置の製造方法

Also Published As

Publication number Publication date
JPS6142428B2 (enrdf_load_stackoverflow) 1986-09-20

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