JPS57157561A - Non-destructive read-out semiconductor memory - Google Patents

Abstract

PURPOSE:To obtain a large capacity RAM in which charge can be effectively inputted and outputted by reducing a potential barrier between a substrate and a charge storage region by utilizing two-dimensional field effect in the vicinity of source and drain regions and producing a charge conduction path in the source and drain regions. CONSTITUTION:An N type ion implanted layer 2 becoming a well is formed on a P type Si substrate 4, and an N<+> type region 11 becoming the drain and bit line of a memory cell transistor and an N<+> type region becoming the source and word line of the transistor are diffused and formed at the prescribed interval in the layer 2. Then, a P type ion implanted layer 8 is formed on the surface layer part of the layer 2 disposed at the intermediate of the regions 11, 12, a thin gate oxidized film 6 is covered on the layer 8, and a polycrystaline Si gate electrode 1 is covered from the above of the film 6 over the ends of the regions 11, 12. With this structure, a read/write voltage VW/R is applied to the electrode 1, a bit line voltage BB is applied to the region 11, a word line voltage Vw applied to the region 12 is varied, and the state of ''1'' or ''0'' is selected according to whether or not holes are stored in the region 8.