JPS5715533A - Logical array circuit possible for write-in - Google Patents
Logical array circuit possible for write-inInfo
- Publication number
- JPS5715533A JPS5715533A JP9020280A JP9020280A JPS5715533A JP S5715533 A JPS5715533 A JP S5715533A JP 9020280 A JP9020280 A JP 9020280A JP 9020280 A JP9020280 A JP 9020280A JP S5715533 A JPS5715533 A JP S5715533A
- Authority
- JP
- Japan
- Prior art keywords
- logical
- inputted
- signal lines
- write
- sets
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
- H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
- H03K19/17712—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays one of the matrices at least being reprogrammable
Landscapes
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Read Only Memory (AREA)
- Logic Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9020280A JPS5715533A (en) | 1980-07-02 | 1980-07-02 | Logical array circuit possible for write-in |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9020280A JPS5715533A (en) | 1980-07-02 | 1980-07-02 | Logical array circuit possible for write-in |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5715533A true JPS5715533A (en) | 1982-01-26 |
JPS6335129B2 JPS6335129B2 (enrdf_load_stackoverflow) | 1988-07-13 |
Family
ID=13991895
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9020280A Granted JPS5715533A (en) | 1980-07-02 | 1980-07-02 | Logical array circuit possible for write-in |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5715533A (enrdf_load_stackoverflow) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4774421A (en) * | 1984-05-03 | 1988-09-27 | Altera Corporation | Programmable logic array device using EPROM technology |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
BR9006976A (pt) * | 1989-10-23 | 1991-10-08 | Microsoft Corp | Dispositivo indicador com grampo ajustavel fixavel a um teclado |
-
1980
- 1980-07-02 JP JP9020280A patent/JPS5715533A/ja active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4774421A (en) * | 1984-05-03 | 1988-09-27 | Altera Corporation | Programmable logic array device using EPROM technology |
Also Published As
Publication number | Publication date |
---|---|
JPS6335129B2 (enrdf_load_stackoverflow) | 1988-07-13 |
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