JPS56137591A - Semiconductor memory device - Google Patents

Semiconductor memory device

Info

Publication number
JPS56137591A
JPS56137591A JP4156980A JP4156980A JPS56137591A JP S56137591 A JPS56137591 A JP S56137591A JP 4156980 A JP4156980 A JP 4156980A JP 4156980 A JP4156980 A JP 4156980A JP S56137591 A JPS56137591 A JP S56137591A
Authority
JP
Japan
Prior art keywords
row
column
lines
line
readout speed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4156980A
Other languages
Japanese (ja)
Other versions
JPS6027118B2 (en
Inventor
Hiroshi Iwahashi
Masamichi Asano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP55041569A priority Critical patent/JPS6027118B2/en
Publication of JPS56137591A publication Critical patent/JPS56137591A/en
Publication of JPS6027118B2 publication Critical patent/JPS6027118B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To increase the readout speed, by discharge of the column line of memory cell from the address data change to the row line designated. CONSTITUTION:A plurality of row lines 191-19n and column lines 201-20m are arranged in matrix, and the memory element is provided at each crossing. The designation of row and column lines is made at row and column recorders 21, 22. While the row line is designated after the address data A0-Am are changed, the pulse generating circuit 27 generating the pulse in which the signal P is at ''1'' level, is provided. This signal turns on the transistors 261-26m, and the row lines 201- 20m are discharged. Thus, since the row line is discharged during a given time, the delay in the readout speed due to discharge time can be avoided and the readout speed can be increased.
JP55041569A 1980-03-31 1980-03-31 semiconductor memory device Expired JPS6027118B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55041569A JPS6027118B2 (en) 1980-03-31 1980-03-31 semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55041569A JPS6027118B2 (en) 1980-03-31 1980-03-31 semiconductor memory device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP62081094A Division JPS63302495A (en) 1987-04-03 1987-04-03 Semiconductor memory device

Publications (2)

Publication Number Publication Date
JPS56137591A true JPS56137591A (en) 1981-10-27
JPS6027118B2 JPS6027118B2 (en) 1985-06-27

Family

ID=12612071

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55041569A Expired JPS6027118B2 (en) 1980-03-31 1980-03-31 semiconductor memory device

Country Status (1)

Country Link
JP (1) JPS6027118B2 (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5968894A (en) * 1982-10-12 1984-04-18 Hitachi Ltd Data line driving circuit in eprom device
JPS59186198A (en) * 1983-04-08 1984-10-22 Seiko Epson Corp Semiconductor storage device
JPS60187998A (en) * 1984-03-07 1985-09-25 Mitsubishi Electric Corp Semiconductor integrated circuit device
JPS60263399A (en) * 1984-06-08 1985-12-26 Nec Corp Semoconductor memory device
JPS626494A (en) * 1985-03-18 1987-01-13 Nec Corp Semiconductor storage device
JPS63117398A (en) * 1986-11-05 1988-05-21 Nec Corp Reading circuit
US5138575A (en) * 1988-12-19 1992-08-11 Fujitsu Limited Electricaly erasable and programmable read only memory with a discharge device

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5968894A (en) * 1982-10-12 1984-04-18 Hitachi Ltd Data line driving circuit in eprom device
JPS59186198A (en) * 1983-04-08 1984-10-22 Seiko Epson Corp Semiconductor storage device
JPS60187998A (en) * 1984-03-07 1985-09-25 Mitsubishi Electric Corp Semiconductor integrated circuit device
JPS60263399A (en) * 1984-06-08 1985-12-26 Nec Corp Semoconductor memory device
JPH0449200B2 (en) * 1984-06-08 1992-08-10 Nippon Electric Co
JPS626494A (en) * 1985-03-18 1987-01-13 Nec Corp Semiconductor storage device
JPS63117398A (en) * 1986-11-05 1988-05-21 Nec Corp Reading circuit
US5138575A (en) * 1988-12-19 1992-08-11 Fujitsu Limited Electricaly erasable and programmable read only memory with a discharge device

Also Published As

Publication number Publication date
JPS6027118B2 (en) 1985-06-27

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