JPS57154859A - Composite semiconductor element - Google Patents

Composite semiconductor element

Info

Publication number
JPS57154859A
JPS57154859A JP56041444A JP4144481A JPS57154859A JP S57154859 A JPS57154859 A JP S57154859A JP 56041444 A JP56041444 A JP 56041444A JP 4144481 A JP4144481 A JP 4144481A JP S57154859 A JPS57154859 A JP S57154859A
Authority
JP
Japan
Prior art keywords
electrodes
electrode
semiconductor element
bump electrode
anode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56041444A
Other languages
Japanese (ja)
Inventor
Hirotake Nagai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP56041444A priority Critical patent/JPS57154859A/en
Publication of JPS57154859A publication Critical patent/JPS57154859A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To enable to perform filp chip bonding by a method wherein all the electrodes of each semiconductor element are constituted of the bump electrode provided on one main surface of a pellet. CONSTITUTION:An oxide film 2 is formed on a silicon wafer 1. Then, a boron implanted layer 4 is formed by implanting boron, and at the same time, an oxide film is formed on the layer 4. Then, an anode Al electrode 5 and a cathode Al electrode 7 are formed. Subsequently, a sintering process is performed to obtained an ohmic contact between the electrodes 5 and 7 and silicon. Then, an anode bump electrode 8 and a cathode bump electrode 9 are formed on the electrodes 5 and 7, and a diode array chip 10 is completed.
JP56041444A 1981-03-19 1981-03-19 Composite semiconductor element Pending JPS57154859A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56041444A JPS57154859A (en) 1981-03-19 1981-03-19 Composite semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56041444A JPS57154859A (en) 1981-03-19 1981-03-19 Composite semiconductor element

Publications (1)

Publication Number Publication Date
JPS57154859A true JPS57154859A (en) 1982-09-24

Family

ID=12608534

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56041444A Pending JPS57154859A (en) 1981-03-19 1981-03-19 Composite semiconductor element

Country Status (1)

Country Link
JP (1) JPS57154859A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5623231A (en) * 1994-09-26 1997-04-22 Endgate Corporation Push-pull power amplifier
US5698469A (en) * 1994-09-26 1997-12-16 Endgate Corporation Method of making a hybrid circuit with a chip having active devices with extra-chip interconnections
US6265937B1 (en) 1994-09-26 2001-07-24 Endgate Corporation Push-pull amplifier with dual coplanar transmission line

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS527676A (en) * 1975-07-08 1977-01-20 Seiko Epson Corp Semiconductor integrated circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS527676A (en) * 1975-07-08 1977-01-20 Seiko Epson Corp Semiconductor integrated circuit

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5623231A (en) * 1994-09-26 1997-04-22 Endgate Corporation Push-pull power amplifier
US5698469A (en) * 1994-09-26 1997-12-16 Endgate Corporation Method of making a hybrid circuit with a chip having active devices with extra-chip interconnections
US5942804A (en) * 1994-09-26 1999-08-24 Endgate Corporation Circuit structure having a matrix of active devices
US6265937B1 (en) 1994-09-26 2001-07-24 Endgate Corporation Push-pull amplifier with dual coplanar transmission line
WO1997017720A2 (en) * 1995-11-08 1997-05-15 Endgate Corporation Circuit structure having a flip-mounted matrix of devices
WO1997017721A2 (en) * 1995-11-08 1997-05-15 Endgate Corporation Method for making a circuit structure having a flip-mounted matrix of devices
WO1997017720A3 (en) * 1995-11-08 1997-06-05 Endgate Technology Corp Circuit structure having a flip-mounted matrix of devices
WO1997017721A3 (en) * 1995-11-08 1997-06-19 Endgate Technology Corp Method for making a circuit structure having a flip-mounted matrix of devices

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