JPS57147751A - Bit exchange system - Google Patents

Bit exchange system

Info

Publication number
JPS57147751A
JPS57147751A JP3333381A JP3333381A JPS57147751A JP S57147751 A JPS57147751 A JP S57147751A JP 3333381 A JP3333381 A JP 3333381A JP 3333381 A JP3333381 A JP 3333381A JP S57147751 A JPS57147751 A JP S57147751A
Authority
JP
Japan
Prior art keywords
array
bit
bit array
conversion
section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3333381A
Other languages
Japanese (ja)
Inventor
Fusao Hata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP3333381A priority Critical patent/JPS57147751A/en
Publication of JPS57147751A publication Critical patent/JPS57147751A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Abstract

PURPOSE:To change an array of input data bit to a desired array in a high speed, by installing a pattern generation section for changing of bit array and a conversion section of bit array. CONSTITUTION:Input data bit is stored in a data input resistor 1 and simultaneously when the bits are inputted to a conversion section for bit array 3 in series one by one, designating numbers No.0-No.15 of the conversion pattern of bit array are registered on a conversion pattern designating number resistor 2, in accordance with the desired order. This designating number is inputted in parallel to the conversion section for bit array 3. The conversion section for bit array 3 takes bit signal 1 wired OR to make it an input of a side of AND circuits 111-1116. Respective bits of a conversion pattern of bit array 2 from a conversion pattern generating section of bit array 4 are connected in parallel and are used as respective inputs of the other. Therefore, the bits whose array is reversed and are stored in a data output resistor 5 are stored in a preset data input resistor 6.
JP3333381A 1981-03-09 1981-03-09 Bit exchange system Pending JPS57147751A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3333381A JPS57147751A (en) 1981-03-09 1981-03-09 Bit exchange system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3333381A JPS57147751A (en) 1981-03-09 1981-03-09 Bit exchange system

Publications (1)

Publication Number Publication Date
JPS57147751A true JPS57147751A (en) 1982-09-11

Family

ID=12383623

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3333381A Pending JPS57147751A (en) 1981-03-09 1981-03-09 Bit exchange system

Country Status (1)

Country Link
JP (1) JPS57147751A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100420477B1 (en) * 1996-12-30 2004-05-20 삼성전자주식회사 Method for transmitting data by using preset mode register

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100420477B1 (en) * 1996-12-30 2004-05-20 삼성전자주식회사 Method for transmitting data by using preset mode register

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