JPS5538684A - Shift register - Google Patents

Shift register

Info

Publication number
JPS5538684A
JPS5538684A JP11260378A JP11260378A JPS5538684A JP S5538684 A JPS5538684 A JP S5538684A JP 11260378 A JP11260378 A JP 11260378A JP 11260378 A JP11260378 A JP 11260378A JP S5538684 A JPS5538684 A JP S5538684A
Authority
JP
Japan
Prior art keywords
rom30
shift
shift register
bits
outputs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11260378A
Other languages
Japanese (ja)
Inventor
Hirobumi Oda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP11260378A priority Critical patent/JPS5538684A/en
Publication of JPS5538684A publication Critical patent/JPS5538684A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C19/00Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/28Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
    • G11C19/287Organisation of a multiplicity of shift registers

Landscapes

  • Shift Register Type Memory (AREA)

Abstract

PURPOSE:To obtain a shift register which makes a shift by any number of bits by feeding a parallel output of ROM back to obtain an address signal. CONSTITUTION:When clock 31 and series data are inputted, access to ROM30 is attained and ROM converts series data 32 into parallel data 33-40 etc., and outputs them. These outputs are fed back to ROM30 so as to address ROM30. As a result, the parallel output of ROM30 is shifted as many times as the pattern of the feedback address corresponding to next clock 31, so that a shift by any number of bits can be made.
JP11260378A 1978-09-12 1978-09-12 Shift register Pending JPS5538684A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11260378A JPS5538684A (en) 1978-09-12 1978-09-12 Shift register

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11260378A JPS5538684A (en) 1978-09-12 1978-09-12 Shift register

Publications (1)

Publication Number Publication Date
JPS5538684A true JPS5538684A (en) 1980-03-18

Family

ID=14590855

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11260378A Pending JPS5538684A (en) 1978-09-12 1978-09-12 Shift register

Country Status (1)

Country Link
JP (1) JPS5538684A (en)

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