JPS5680885A - Data output control system of memory used for reading - Google Patents
Data output control system of memory used for readingInfo
- Publication number
- JPS5680885A JPS5680885A JP15561079A JP15561079A JPS5680885A JP S5680885 A JPS5680885 A JP S5680885A JP 15561079 A JP15561079 A JP 15561079A JP 15561079 A JP15561079 A JP 15561079A JP S5680885 A JPS5680885 A JP S5680885A
- Authority
- JP
- Japan
- Prior art keywords
- bit
- signal
- rank
- parallel
- rom16
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G1/00—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data
- G09G1/02—Storage circuits
Landscapes
- Engineering & Computer Science (AREA)
- Radar, Positioning & Navigation (AREA)
- Remote Sensing (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Read Only Memory (AREA)
Abstract
PURPOSE:To eliminte an idle vacant memory portion by reading out two system standard product ROM selectively in a character display device and using it an ROM of 4 bit parallel output type equivalently. CONSTITUTION:ROM as a standard product of 8 bit parallel output type 15 and 16 are used, and at of the character code signals 17 to be applied to ROM15 and rester address signal 21, all signal lines except the uppermost rank bit of the signal 21 are given to ROM16 and the upper rank bit signal line of the signal 21 is given to a switching circuit 18 and made as a control signal for changing over the respective 4 bits of the upper rank and the lowe rank of the parallel outpt of ROM16. Then, based on the control signal in the circuit 18, and out of the parallel output data from ROM16, the upper rank and the lower rank respective bit is selected and the parallel data of 12 bit, together with the parallel output from ROM15 is fed to the converter 19. The converter 19 converts the parallel character pattern bit signal into series and outputs as an image signal 20.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15561079A JPS5680885A (en) | 1979-12-03 | 1979-12-03 | Data output control system of memory used for reading |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15561079A JPS5680885A (en) | 1979-12-03 | 1979-12-03 | Data output control system of memory used for reading |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5680885A true JPS5680885A (en) | 1981-07-02 |
Family
ID=15609778
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15561079A Pending JPS5680885A (en) | 1979-12-03 | 1979-12-03 | Data output control system of memory used for reading |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5680885A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6055452A (en) * | 1983-08-12 | 1985-03-30 | ローベルト・ボツシユ・ゲゼルシヤフト・ミツト・ベシユレンクテル・ハフツング | Method of storing value into computer memory |
| JP2002063070A (en) * | 2000-08-18 | 2002-02-28 | Fujitsu Ltd | Arithmetic unit and method of arithmetic operation |
-
1979
- 1979-12-03 JP JP15561079A patent/JPS5680885A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6055452A (en) * | 1983-08-12 | 1985-03-30 | ローベルト・ボツシユ・ゲゼルシヤフト・ミツト・ベシユレンクテル・ハフツング | Method of storing value into computer memory |
| JP2002063070A (en) * | 2000-08-18 | 2002-02-28 | Fujitsu Ltd | Arithmetic unit and method of arithmetic operation |
| JP4629198B2 (en) * | 2000-08-18 | 2011-02-09 | 富士通セミコンダクター株式会社 | Arithmetic apparatus and arithmetic method |
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