JPS57145345A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS57145345A
JPS57145345A JP56030862A JP3086281A JPS57145345A JP S57145345 A JPS57145345 A JP S57145345A JP 56030862 A JP56030862 A JP 56030862A JP 3086281 A JP3086281 A JP 3086281A JP S57145345 A JPS57145345 A JP S57145345A
Authority
JP
Japan
Prior art keywords
package
ceramic
coating
sio2 film
alpha rays
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56030862A
Other languages
Japanese (ja)
Inventor
Takashi Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56030862A priority Critical patent/JPS57145345A/en
Publication of JPS57145345A publication Critical patent/JPS57145345A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H01L23/556—Protection against radiation, e.g. light or electromagnetic waves against alpha rays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/15165—Monolayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]

Landscapes

  • Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To prevent false operation of an element due to alpha rays by coating with an SiO2 film the surface of the ceramic inside wall of a hermetic chamber of a package wherein a chip is fixed. CONSTITUTION:The inside surface of a ceramic package is coated with an SiO2 film, preferably with a synthetic filler 6. Therefore, the inside surface of the package is occupied by the coating 6 and either of a metal cap 2 or a metallized part 4 and a ceramic surface which is a main source of generation of alpha rays is not exposed, and thus the false operation of the element 3 can be prevented.
JP56030862A 1981-03-04 1981-03-04 Semiconductor device Pending JPS57145345A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56030862A JPS57145345A (en) 1981-03-04 1981-03-04 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56030862A JPS57145345A (en) 1981-03-04 1981-03-04 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS57145345A true JPS57145345A (en) 1982-09-08

Family

ID=12315529

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56030862A Pending JPS57145345A (en) 1981-03-04 1981-03-04 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS57145345A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7382043B2 (en) * 2002-09-25 2008-06-03 Maxwell Technologies, Inc. Method and apparatus for shielding an integrated circuit from radiation
US7696610B2 (en) 2003-07-16 2010-04-13 Maxwell Technologies, Inc. Apparatus for shielding integrated circuit devices

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55105352A (en) * 1979-02-06 1980-08-12 Fujitsu Ltd Semiconductor package structure
JPS55128845A (en) * 1979-03-28 1980-10-06 Hitachi Ltd Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55105352A (en) * 1979-02-06 1980-08-12 Fujitsu Ltd Semiconductor package structure
JPS55128845A (en) * 1979-03-28 1980-10-06 Hitachi Ltd Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7382043B2 (en) * 2002-09-25 2008-06-03 Maxwell Technologies, Inc. Method and apparatus for shielding an integrated circuit from radiation
US7696610B2 (en) 2003-07-16 2010-04-13 Maxwell Technologies, Inc. Apparatus for shielding integrated circuit devices

Similar Documents

Publication Publication Date Title
JPS4810904B1 (en)
SE7511249L (en) LIGHT-LIKE SEMI-LEADER
JPS5591145A (en) Production of ceramic package
JPS57145345A (en) Semiconductor device
JPS56103452A (en) Semiconductor device
JPS5585077A (en) Semi-conductor apparatus
JPS55130149A (en) Semiconductor device
JPS56165341A (en) Semiconductor device
JPS5567151A (en) Semiconductor device
JPS5645053A (en) Semiconductor device
JPS5637655A (en) Semiconductor memory device
JPS6469038A (en) Resin-sealed semiconductor device
JPS5374368A (en) Package for semiconductor device
JPS56165243A (en) Nonvolatile getter device
JPS5287877A (en) Incandescent lamp
JPS5512772A (en) Semiconductor device
JPS5367358A (en) Semiconductor device
JPS5330873A (en) Packaging structure of ic
JPS5391686A (en) Photo semiconductor device
JPS53118371A (en) Manufacture of semiconductor device
JPS5351979A (en) Semiconductor device and its manufacture
JPS54105964A (en) Semiconductor device and its manufacture
JPS55163864A (en) Semiconductor device
JPS5433379A (en) Reflection type fluorescent lamp
JPS5247375A (en) Semoiconductor device