JPS57136838A - Code converter - Google Patents
Code converterInfo
- Publication number
- JPS57136838A JPS57136838A JP56022559A JP2255981A JPS57136838A JP S57136838 A JPS57136838 A JP S57136838A JP 56022559 A JP56022559 A JP 56022559A JP 2255981 A JP2255981 A JP 2255981A JP S57136838 A JPS57136838 A JP S57136838A
- Authority
- JP
- Japan
- Prior art keywords
- data series
- terminal
- register
- given
- modn
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B14/00—Transmission systems not characterised by the medium used for transmission
- H04B14/02—Transmission systems not characterised by the medium used for transmission characterised by the use of pulse modulation
- H04B14/04—Transmission systems not characterised by the medium used for transmission characterised by the use of pulse modulation using pulse code modulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
Abstract
PURPOSE:To eliminate the take-up and take-down of figure in the four rules of arithmetic of a coefficient caused by the four rules of arithmetic of a polynomial, by defining 2 as a divisor. CONSTITUTION:An input data series applied to a terminal 101 is set at A(x), and a selection register 105 stores A(x). A selector 103 selects with the timing 1 the data series A(x) supplied from the terminal 101 to the data series A(x) given from the terminal 101 as well as to the data series A(x) given from the register 105. A multiplier divider 104 converts the data series A(x) given from the selector 103 and the register 105 into A(x)<2>[modn(x)]and stores it in the register 105. After this, the selector 103 selects in the same way the data series A(x) given from ther terminal 101 to the data series A(x) from the terminal 101 plus the data series A(x)<2i0-i1>[modn(x)]with the timing i0+i1+1. The multiplier/divider 104 converts above-mentioned both data series into A(x)<2i0-i1+1>[modn(x)] to store it in the register 105.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56022559A JPS57136838A (en) | 1981-02-18 | 1981-02-18 | Code converter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56022559A JPS57136838A (en) | 1981-02-18 | 1981-02-18 | Code converter |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57136838A true JPS57136838A (en) | 1982-08-24 |
JPH0245388B2 JPH0245388B2 (en) | 1990-10-09 |
Family
ID=12086210
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56022559A Granted JPS57136838A (en) | 1981-02-18 | 1981-02-18 | Code converter |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57136838A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03179923A (en) * | 1989-12-08 | 1991-08-05 | Matsushita Electric Ind Co Ltd | Method and device for decoding bch code |
-
1981
- 1981-02-18 JP JP56022559A patent/JPS57136838A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03179923A (en) * | 1989-12-08 | 1991-08-05 | Matsushita Electric Ind Co Ltd | Method and device for decoding bch code |
Also Published As
Publication number | Publication date |
---|---|
JPH0245388B2 (en) | 1990-10-09 |
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