JPS57133645A - Semiconductor integrated circuit device and manufacture thereof - Google Patents
Semiconductor integrated circuit device and manufacture thereofInfo
- Publication number
- JPS57133645A JPS57133645A JP1946281A JP1946281A JPS57133645A JP S57133645 A JPS57133645 A JP S57133645A JP 1946281 A JP1946281 A JP 1946281A JP 1946281 A JP1946281 A JP 1946281A JP S57133645 A JPS57133645 A JP S57133645A
- Authority
- JP
- Japan
- Prior art keywords
- film
- layer
- groove
- coated
- polycrystalline
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/763—Polycrystalline semiconductor regions
Abstract
PURPOSE:To obtain an isolation layer free from bird's beaks and the like by a method wherein, when an IC device is insulation-isolated using a delivative, a V-shape isolation groove surrounding an active region is provided, an SiO2 film, an Si3N4 film and a polycrystalline layer are provided on the side face of the groove, and through the intermediaries of these film and layer, a PSG film is filled in the isolation groove. CONSTITUTION:An N<+> type buried layer 20 is formed on a P type Si substrate 11, an N type layer 12 is epitaxially grown on the whole surface including the layer 20, and an SiO2 film 21 and an Si3N4 film 22 are laminated and coated on the whole surface. Then, a photoresist pattern 23 is coated on the active region 19 located on the layer 20, a V-shape isolation groove 13, which is penetrating the layer 12 and entering into the substrate 11, is formed by performing etching. Subsequently, the pattern 23 is removed, SiO2 film 14 which will be connected to the film 21 is coated along the side face of the groove 13, the groove 13 is filled up by growing a polycrystalline Si layer 15 on the whole surface including the film 14, and a PSG film 16 is coated on the layer 15. Then, the film 16 is fused by performing heat treatment, the film 16 is left over on the groove 13 alone, and a polycrystalline Si layer 25 is deposited contacting the film 16.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1946281A JPS57133645A (en) | 1981-02-12 | 1981-02-12 | Semiconductor integrated circuit device and manufacture thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1946281A JPS57133645A (en) | 1981-02-12 | 1981-02-12 | Semiconductor integrated circuit device and manufacture thereof |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57133645A true JPS57133645A (en) | 1982-08-18 |
JPH0217937B2 JPH0217937B2 (en) | 1990-04-24 |
Family
ID=11999986
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1946281A Granted JPS57133645A (en) | 1981-02-12 | 1981-02-12 | Semiconductor integrated circuit device and manufacture thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57133645A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02156552A (en) * | 1988-12-08 | 1990-06-15 | Nec Corp | Semiconductor device and manufacture thereof |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4869485A (en) * | 1971-12-22 | 1973-09-20 | ||
JPS5379473A (en) * | 1976-12-24 | 1978-07-13 | Fujitsu Ltd | Manufacture of semiconductor device |
-
1981
- 1981-02-12 JP JP1946281A patent/JPS57133645A/en active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4869485A (en) * | 1971-12-22 | 1973-09-20 | ||
JPS5379473A (en) * | 1976-12-24 | 1978-07-13 | Fujitsu Ltd | Manufacture of semiconductor device |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02156552A (en) * | 1988-12-08 | 1990-06-15 | Nec Corp | Semiconductor device and manufacture thereof |
Also Published As
Publication number | Publication date |
---|---|
JPH0217937B2 (en) | 1990-04-24 |
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