JPS57129029A - Three-state circuit - Google Patents
Three-state circuitInfo
- Publication number
- JPS57129029A JPS57129029A JP56012961A JP1296181A JPS57129029A JP S57129029 A JPS57129029 A JP S57129029A JP 56012961 A JP56012961 A JP 56012961A JP 1296181 A JP1296181 A JP 1296181A JP S57129029 A JPS57129029 A JP S57129029A
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- transistors
- level
- emitter
- constant
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
- H03K19/0823—Multistate logic
- H03K19/0826—Multistate logic one of the states being the high impedance or floating state
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56012961A JPS57129029A (en) | 1981-02-02 | 1981-02-02 | Three-state circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56012961A JPS57129029A (en) | 1981-02-02 | 1981-02-02 | Three-state circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57129029A true JPS57129029A (en) | 1982-08-10 |
| JPH0328089B2 JPH0328089B2 (enrdf_load_html_response) | 1991-04-18 |
Family
ID=11819846
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56012961A Granted JPS57129029A (en) | 1981-02-02 | 1981-02-02 | Three-state circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57129029A (enrdf_load_html_response) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5980022A (ja) * | 1982-09-28 | 1984-05-09 | モノリシツク・メモリ−ズ・インコ−ポレイテツド | アクテイブ出力デイスエ−ブル回路 |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54111746A (en) * | 1978-02-22 | 1979-09-01 | Fujitsu Ltd | Logic output circuit |
-
1981
- 1981-02-02 JP JP56012961A patent/JPS57129029A/ja active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54111746A (en) * | 1978-02-22 | 1979-09-01 | Fujitsu Ltd | Logic output circuit |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5980022A (ja) * | 1982-09-28 | 1984-05-09 | モノリシツク・メモリ−ズ・インコ−ポレイテツド | アクテイブ出力デイスエ−ブル回路 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0328089B2 (enrdf_load_html_response) | 1991-04-18 |
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