JPS57129029A - Three-state circuit - Google Patents

Three-state circuit

Info

Publication number
JPS57129029A
JPS57129029A JP56012961A JP1296181A JPS57129029A JP S57129029 A JPS57129029 A JP S57129029A JP 56012961 A JP56012961 A JP 56012961A JP 1296181 A JP1296181 A JP 1296181A JP S57129029 A JPS57129029 A JP S57129029A
Authority
JP
Japan
Prior art keywords
transistor
transistors
level
emitter
constant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56012961A
Other languages
Japanese (ja)
Other versions
JPH0328089B2 (en
Inventor
Ryohei Saga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Microcomputer System Ltd
Hitachi Ltd
Original Assignee
Hitachi Ltd
Hitachi Microcomputer Engineering Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Microcomputer Engineering Ltd filed Critical Hitachi Ltd
Priority to JP56012961A priority Critical patent/JPS57129029A/en
Publication of JPS57129029A publication Critical patent/JPS57129029A/en
Publication of JPH0328089B2 publication Critical patent/JPH0328089B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/0823Multistate logic
    • H03K19/0826Multistate logic one of the states being the high impedance or floating state

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To simplify a circuit configuration, by providing a transistor for short- circuiting the base and the emitter of both transistors, in a totem pole circuit consisting of a constant-current transistor and an output transistor. CONSTITUTION:On a totem pole circuit consisting of a constant-current transistor TR10 and an output transistor TR1, transistors Q1, Q3 for short-circuiting the base and the emitter of both the transistors TR10, TR1 are provided. In this state, an output terminal OUT connected to the collector of the output transistor TR1 is set to ''0'' level and ''1'' level by applying a driving signal DRV of a low level. Also, the output terminal OUT is made to high impedance and is made to the third level being floating, by cutting the voltage between the base and the emitter of the constant-current transistor TR10 and the output transistor TR1 by the transistors Q1, Q3.
JP56012961A 1981-02-02 1981-02-02 Three-state circuit Granted JPS57129029A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56012961A JPS57129029A (en) 1981-02-02 1981-02-02 Three-state circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56012961A JPS57129029A (en) 1981-02-02 1981-02-02 Three-state circuit

Publications (2)

Publication Number Publication Date
JPS57129029A true JPS57129029A (en) 1982-08-10
JPH0328089B2 JPH0328089B2 (en) 1991-04-18

Family

ID=11819846

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56012961A Granted JPS57129029A (en) 1981-02-02 1981-02-02 Three-state circuit

Country Status (1)

Country Link
JP (1) JPS57129029A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5980022A (en) * 1982-09-28 1984-05-09 モノリシツク・メモリ−ズ・インコ−ポレイテツド Active output disable circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54111746A (en) * 1978-02-22 1979-09-01 Fujitsu Ltd Logic output circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54111746A (en) * 1978-02-22 1979-09-01 Fujitsu Ltd Logic output circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5980022A (en) * 1982-09-28 1984-05-09 モノリシツク・メモリ−ズ・インコ−ポレイテツド Active output disable circuit

Also Published As

Publication number Publication date
JPH0328089B2 (en) 1991-04-18

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