JPS54111746A - Logic output circuit - Google Patents

Logic output circuit

Info

Publication number
JPS54111746A
JPS54111746A JP1847678A JP1847678A JPS54111746A JP S54111746 A JPS54111746 A JP S54111746A JP 1847678 A JP1847678 A JP 1847678A JP 1847678 A JP1847678 A JP 1847678A JP S54111746 A JPS54111746 A JP S54111746A
Authority
JP
Japan
Prior art keywords
logic
output
supply voltage
power supply
inhibit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1847678A
Other languages
Japanese (ja)
Inventor
Hiroshi Matsunaga
Shinichiro Obara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP1847678A priority Critical patent/JPS54111746A/en
Publication of JPS54111746A publication Critical patent/JPS54111746A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/0823—Multistate logic
    • H03K19/0826—Multistate logic one of the states being the high impedance or floating state

Landscapes

  • Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)

Abstract

PURPOSE:To make the output logic surely high impedance even with the power supply voltage lowered, by providing the inhibit logic on mains failure with the logic output circuit having tristate outputs. CONSTITUTION:When the signal logic of 0 or 1 is inputted, 0 or 1 is outputted, and when inhibit logic is inputted, the impedance is high: totem pole type circuit, the inhibit logic 5 is used for the logic output circuit for the circuit on mains failure. Further, with the output of high impedance state, Zener diode ZD1 is conducted when the power supply voltage is sufficiently high, normal operation, turning on transistor TrQ11 and off Q12 and Q13, which is the operation for normal circuits. When the power supply voltage is lowered, the inhibit logic interrupts the diode ZD1 before normal operation is lost. TrQ11 is turned off and Q12, Q13 are turned on, forming current loop flowing the path of resistor R3, TrQ13, and ground. It causes TrQ5 to turn off and the high impedance state of output is kept.
JP1847678A 1978-02-22 1978-02-22 Logic output circuit Pending JPS54111746A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1847678A JPS54111746A (en) 1978-02-22 1978-02-22 Logic output circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1847678A JPS54111746A (en) 1978-02-22 1978-02-22 Logic output circuit

Publications (1)

Publication Number Publication Date
JPS54111746A true JPS54111746A (en) 1979-09-01

Family

ID=11972685

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1847678A Pending JPS54111746A (en) 1978-02-22 1978-02-22 Logic output circuit

Country Status (1)

Country Link
JP (1) JPS54111746A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57129029A (en) * 1981-02-02 1982-08-10 Hitachi Ltd Three-state circuit
JPS5839284A (en) * 1981-09-02 1983-03-07 Nec Corp Inverter circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50120126A (en) * 1974-03-12 1975-09-20

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50120126A (en) * 1974-03-12 1975-09-20

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57129029A (en) * 1981-02-02 1982-08-10 Hitachi Ltd Three-state circuit
JPH0328089B2 (en) * 1981-02-02 1991-04-18 Hitachi Seisakusho Kk
JPS5839284A (en) * 1981-09-02 1983-03-07 Nec Corp Inverter circuit

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