JPS57123740A - Counter circuit - Google Patents

Counter circuit

Info

Publication number
JPS57123740A
JPS57123740A JP847881A JP847881A JPS57123740A JP S57123740 A JPS57123740 A JP S57123740A JP 847881 A JP847881 A JP 847881A JP 847881 A JP847881 A JP 847881A JP S57123740 A JPS57123740 A JP S57123740A
Authority
JP
Japan
Prior art keywords
counter
timing signal
counter circuit
input
response
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP847881A
Other languages
Japanese (ja)
Inventor
Osamu Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP847881A priority Critical patent/JPS57123740A/en
Publication of JPS57123740A publication Critical patent/JPS57123740A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K21/00Details of pulse counters or frequency dividers
    • H03K21/02Input circuits

Landscapes

  • Manipulation Of Pulses (AREA)

Abstract

PURPOSE:To simplify a counter circuit which counts pieces of pulse input information by counting them by one counter by using a timing signal which corresponds to a sequence of input pulses. CONSTITUTION:Every time pulse information is inputted to input terminals 1-3, input pulses are counted in response to timing signals CK1-CK3. Then, the output of the counter is written in a data storage part 15 in response to a timing signal CK4 from a decoder 6 a prescribed time later, and the counter 14 is reset by a timing signal CK5.
JP847881A 1981-01-22 1981-01-22 Counter circuit Pending JPS57123740A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP847881A JPS57123740A (en) 1981-01-22 1981-01-22 Counter circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP847881A JPS57123740A (en) 1981-01-22 1981-01-22 Counter circuit

Publications (1)

Publication Number Publication Date
JPS57123740A true JPS57123740A (en) 1982-08-02

Family

ID=11694213

Family Applications (1)

Application Number Title Priority Date Filing Date
JP847881A Pending JPS57123740A (en) 1981-01-22 1981-01-22 Counter circuit

Country Status (1)

Country Link
JP (1) JPS57123740A (en)

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