JPS55132179A - Vertical-address-clear-pulse generating circuit - Google Patents
Vertical-address-clear-pulse generating circuitInfo
- Publication number
- JPS55132179A JPS55132179A JP3913679A JP3913679A JPS55132179A JP S55132179 A JPS55132179 A JP S55132179A JP 3913679 A JP3913679 A JP 3913679A JP 3913679 A JP3913679 A JP 3913679A JP S55132179 A JPS55132179 A JP S55132179A
- Authority
- JP
- Japan
- Prior art keywords
- pulse
- address
- vertical synchronizing
- reset
- counter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/79—Processing of colour television signals in connection with recording
- H04N9/87—Regeneration of colour television signals
- H04N9/89—Time-base error compensation
- H04N9/896—Time-base error compensation using a digital memory with independent write-in and read-out clock generators
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Television Signal Processing For Recording (AREA)
Abstract
PURPOSE:To make accurate corrections of the time axis of a reproduced output signal by generating an address clear pulse by counting a horizontal synchronizing signal or multiplied signal included in a vertical synchronizing period right before. CONSTITUTION:The output signal of control oscillator 38 is counted down by counter 44 to obtain address clear pulse 46 in a vertical synchronizing period. This counter 44 is reset by reset pulse 45, i.e., a vertical synchronizing pulse separated from an input video signal. This counter 44 is capable of storing the number of lines included in the period of two reset pulses 45, so that even in case of absence of reset pulse 45, the number of lines included in one vertical synchronizing period right before the absence will be counted and outputted 46. An address can therefore be cleard accurately.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3913679A JPS55132179A (en) | 1979-03-30 | 1979-03-30 | Vertical-address-clear-pulse generating circuit |
| US06/135,084 US4373168A (en) | 1979-03-30 | 1980-03-28 | Digital time-base corrector having a wide correction range |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3913679A JPS55132179A (en) | 1979-03-30 | 1979-03-30 | Vertical-address-clear-pulse generating circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS55132179A true JPS55132179A (en) | 1980-10-14 |
| JPH0332272B2 JPH0332272B2 (en) | 1991-05-10 |
Family
ID=12544684
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3913679A Granted JPS55132179A (en) | 1979-03-30 | 1979-03-30 | Vertical-address-clear-pulse generating circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS55132179A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1985005001A1 (en) * | 1984-04-24 | 1985-11-07 | Matsushita Electric Industrial Co., Ltd. | Device for correcting time axis |
| JPH0216886A (en) * | 1988-07-04 | 1990-01-19 | Matsushita Electric Ind Co Ltd | Digital video signal receiver |
-
1979
- 1979-03-30 JP JP3913679A patent/JPS55132179A/en active Granted
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1985005001A1 (en) * | 1984-04-24 | 1985-11-07 | Matsushita Electric Industrial Co., Ltd. | Device for correcting time axis |
| US4733312A (en) * | 1984-04-24 | 1988-03-22 | Matsushita Electric Industrial Co., Ltd. | Time-base corrector |
| JPH0216886A (en) * | 1988-07-04 | 1990-01-19 | Matsushita Electric Ind Co Ltd | Digital video signal receiver |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0332272B2 (en) | 1991-05-10 |
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