JPS5684079A - Vertical synchronizing circuit - Google Patents

Vertical synchronizing circuit

Info

Publication number
JPS5684079A
JPS5684079A JP16119979A JP16119979A JPS5684079A JP S5684079 A JPS5684079 A JP S5684079A JP 16119979 A JP16119979 A JP 16119979A JP 16119979 A JP16119979 A JP 16119979A JP S5684079 A JPS5684079 A JP S5684079A
Authority
JP
Japan
Prior art keywords
pulse
circuit
signal
supplied
synchronizing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16119979A
Other languages
Japanese (ja)
Other versions
JPS648956B2 (en
Inventor
Shoji Omori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP16119979A priority Critical patent/JPS5684079A/en
Publication of JPS5684079A publication Critical patent/JPS5684079A/en
Publication of JPS648956B2 publication Critical patent/JPS648956B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/76—Television signal recording
    • H04N5/91—Television signal processing therefor
    • H04N5/93—Regeneration of the television signal or of selected parts thereof
    • H04N5/932—Regeneration of analogue synchronisation signals

Abstract

PURPOSE:To make it possible to obtain a synchronizing pulse synchronizing with a synchronizing signal varying in vertical period even when this is inputted, by generating a false vertical synchronizing signal by providing a pulse generating circuit. CONSTITUTION:Vertical synchronizing signal VD separated from a reproduced video signal is supplied via AND gate circuit 10 to FF circuit 21, whose output pulse is supplied as a gate pulse to AND gate circuit 22 and clock pulse Cp gated is counted by counter 23. Then, FF circuit 40 is reset by pulse Pa obtained here to inhibit the input of signal VD. Consequently, pulse Pa synchronizing with only signal VD artificially inserted by gate pulse Pb can be obtained. Pulse pa is supplied to FF circuit 31 to generate pulse Pc of width determined on the basis of the maximum varying width of signal VD and this pulse is supplied to counter 33 to obtain pulses Pd and Pe, which are supplied via circuit 51 to FF circuit 52. Then, pulse Pf is generated there and supplied to counter 54, so that clock pulse Cp will be controlled.
JP16119979A 1979-12-12 1979-12-12 Vertical synchronizing circuit Granted JPS5684079A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16119979A JPS5684079A (en) 1979-12-12 1979-12-12 Vertical synchronizing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16119979A JPS5684079A (en) 1979-12-12 1979-12-12 Vertical synchronizing circuit

Publications (2)

Publication Number Publication Date
JPS5684079A true JPS5684079A (en) 1981-07-09
JPS648956B2 JPS648956B2 (en) 1989-02-15

Family

ID=15730464

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16119979A Granted JPS5684079A (en) 1979-12-12 1979-12-12 Vertical synchronizing circuit

Country Status (1)

Country Link
JP (1) JPS5684079A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6292685A (en) * 1985-10-18 1987-04-28 Matsushita Electric Ind Co Ltd Video signal processor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6292685A (en) * 1985-10-18 1987-04-28 Matsushita Electric Ind Co Ltd Video signal processor

Also Published As

Publication number Publication date
JPS648956B2 (en) 1989-02-15

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