JPS5527774A - Synchronous signal isolator device - Google Patents

Synchronous signal isolator device

Info

Publication number
JPS5527774A
JPS5527774A JP10109778A JP10109778A JPS5527774A JP S5527774 A JPS5527774 A JP S5527774A JP 10109778 A JP10109778 A JP 10109778A JP 10109778 A JP10109778 A JP 10109778A JP S5527774 A JPS5527774 A JP S5527774A
Authority
JP
Japan
Prior art keywords
synchronous signal
video signal
signal
circuit
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10109778A
Other languages
Japanese (ja)
Inventor
Kenichi Hasegawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP10109778A priority Critical patent/JPS5527774A/en
Publication of JPS5527774A publication Critical patent/JPS5527774A/en
Pending legal-status Critical Current

Links

Landscapes

  • Synchronizing For Television (AREA)

Abstract

PURPOSE:To stabilize the operation by emphasizing the front edge bend of the synchronous signal for the device which isolates the synchronous signal from the composite video signal, at the same time extracting a high-accuracy synchronous signal with reduction of the noise effect. CONSTITUTION:The synchronous signal based on the fixed 1st voltage level is isolated from the composite video signal of input terminal 1 by means of 1st synchronous signal isolating means 2. Making use of this isolated synchronous signal, the pulse is produced via pulse production circuit 3 within the back porch period of the video signal, featuring a shorter period than the back porch period. With this pulse and the video signal, the back porch voltage of the video signal is detected at sample holding circuit 5. And the sink chip voltage of the video signal is detected by the video signal and the synchronous signal of the circuit 2 and via sample holding circuit 4. With output voltage B and A of circuit 4 and 5, the intermediate reference voltage is produced at adder circuit 6. Based on this reference voltage, the synchronous signal is delivered through 2nd synchronous signal isolating means 7.
JP10109778A 1978-08-18 1978-08-18 Synchronous signal isolator device Pending JPS5527774A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10109778A JPS5527774A (en) 1978-08-18 1978-08-18 Synchronous signal isolator device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10109778A JPS5527774A (en) 1978-08-18 1978-08-18 Synchronous signal isolator device

Publications (1)

Publication Number Publication Date
JPS5527774A true JPS5527774A (en) 1980-02-28

Family

ID=14291581

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10109778A Pending JPS5527774A (en) 1978-08-18 1978-08-18 Synchronous signal isolator device

Country Status (1)

Country Link
JP (1) JPS5527774A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6183376U (en) * 1984-11-02 1986-06-02

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6183376U (en) * 1984-11-02 1986-06-02

Similar Documents

Publication Publication Date Title
JPS54104230A (en) Processing circuit for vertical synchronizing signal
JPS5527774A (en) Synchronous signal isolator device
JPS57210718A (en) Signal change detecting circuit
JPS5430727A (en) Noise eliminator circuit of synchronous separator circuit
JPS54100652A (en) Sampler
JPS5596800A (en) Transmission circuit
JPS5534382A (en) Separator circuit for synchronizing signal
JPS5360539A (en) Digital filter
JPS5426772A (en) Operational system
JPS5423315A (en) Synchronizing-separator circuit
JPS555591A (en) Filter unit for pulse pick up
JPS5552633A (en) Pulse multiplication unit
JPS5520006A (en) Noise filter circuit
JPS5334428A (en) Detecting circuit for video information
JPS5526720A (en) Noise pulse suppression system
WO2001017128A3 (en) Synchronous delay generator
JPS53117925A (en) Frequency control circuit
JPS56131242A (en) Signal receiving circuit
JPS547828A (en) Balanced reception circuit
JPS53110443A (en) Operation unit
JPS5732188A (en) Pcm picture transmission system
JPS5432924A (en) Noise eliminator circuit
JPS5533335A (en) Signaling signal detection system
JPS55150670A (en) Vertical synchronizing signal separating circuit
JPS5451766A (en) Frequency multiplying circuit

Legal Events

Date Code Title Description
A621 Written request for application examination

Effective date: 20040220

Free format text: JAPANESE INTERMEDIATE CODE: A621

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20051011

A313 Final decision of rejection without a dissenting response from the applicant

Effective date: 20060227

Free format text: JAPANESE INTERMEDIATE CODE: A313

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20060718