JPS57118668A - Fuse rom structure for semiconductor device - Google Patents

Fuse rom structure for semiconductor device

Info

Publication number
JPS57118668A
JPS57118668A JP433181A JP433181A JPS57118668A JP S57118668 A JPS57118668 A JP S57118668A JP 433181 A JP433181 A JP 433181A JP 433181 A JP433181 A JP 433181A JP S57118668 A JPS57118668 A JP S57118668A
Authority
JP
Japan
Prior art keywords
film
oxide film
thermal oxide
semiconductor device
temperature thermal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP433181A
Other languages
Japanese (ja)
Inventor
Koichi Takahashi
Masaharu Ogura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP433181A priority Critical patent/JPS57118668A/en
Publication of JPS57118668A publication Critical patent/JPS57118668A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5252—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

PURPOSE:To improve the protective reliability as well as to obtain the fuse ROM structure for a microscopically formed semiconductor device by a method wherein a polycrystalline silicon layer is formed through the intermediaries of a high temperature thermal oxide film and an insulation-proof distribution film. CONSTITUTION:A high temperature thermal oxide film 11, an insulation-proof distribution film 12, and a low temperature oxide film 13 are formed on a semiconductor substrate 10, and a polycrystalline silicon layer 14 of a prescribed pattern are formed on a low temperature oxide film 13. The fuse ROM construction 15 has the structure wherein the dielectric breakdown resistant film 12, as a passivation film located directly below the polycrystalline silicon layer 14, is pinched by the high temperature thermal oxide film 11 and the low temperature thermal oxide film 13, and as the above has a very thin film thickness, the semiconductor device can be microscopically formed easily. Also, as there exists the insulation-proof destruction film 12, the protective reliability for the heating of the fuse and a high current when an ROM writing-in is performed can be increased.
JP433181A 1981-01-14 1981-01-14 Fuse rom structure for semiconductor device Pending JPS57118668A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP433181A JPS57118668A (en) 1981-01-14 1981-01-14 Fuse rom structure for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP433181A JPS57118668A (en) 1981-01-14 1981-01-14 Fuse rom structure for semiconductor device

Publications (1)

Publication Number Publication Date
JPS57118668A true JPS57118668A (en) 1982-07-23

Family

ID=11581457

Family Applications (1)

Application Number Title Priority Date Filing Date
JP433181A Pending JPS57118668A (en) 1981-01-14 1981-01-14 Fuse rom structure for semiconductor device

Country Status (1)

Country Link
JP (1) JPS57118668A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0250078A2 (en) * 1986-05-09 1987-12-23 Actel Corporation Programmable low impedance interconnect circuit element
US5412244A (en) * 1986-05-09 1995-05-02 Actel Corporation Electrically-programmable low-impedance anti-fuse element

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0250078A2 (en) * 1986-05-09 1987-12-23 Actel Corporation Programmable low impedance interconnect circuit element
US5412244A (en) * 1986-05-09 1995-05-02 Actel Corporation Electrically-programmable low-impedance anti-fuse element

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