JPS57113158A - Information processing system - Google Patents
Information processing systemInfo
- Publication number
- JPS57113158A JPS57113158A JP55187897A JP18789780A JPS57113158A JP S57113158 A JPS57113158 A JP S57113158A JP 55187897 A JP55187897 A JP 55187897A JP 18789780 A JP18789780 A JP 18789780A JP S57113158 A JPS57113158 A JP S57113158A
- Authority
- JP
- Japan
- Prior art keywords
- store
- address
- addresses
- instruction
- collection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
Abstract
PURPOSE:To shorten test time by improving debugging efficiency by collecting addresses and data information corresponding to instructions executed ranging from a starting address to an ending address. CONSTITUTION:When the addresses of store instructions executed by an object program 8 ranging from a specified starting address to an ending address, store addresses, and a store data are pooled in a pool part 14, a signal from an information collection part 13 is supplied to a run track control part 15. When a next instruction is a store instruction again, the control part analyzes the instruction to obtain its store address for the collection of old data in the collection part 13, and discriminates the next dynamic step of the object program 8 on the basis of register save information during interruption for next interruption, thereby specifying a fetch trap at the address.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55187897A JPS57113158A (en) | 1980-12-29 | 1980-12-29 | Information processing system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55187897A JPS57113158A (en) | 1980-12-29 | 1980-12-29 | Information processing system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57113158A true JPS57113158A (en) | 1982-07-14 |
Family
ID=16214101
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55187897A Pending JPS57113158A (en) | 1980-12-29 | 1980-12-29 | Information processing system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57113158A (en) |
-
1980
- 1980-12-29 JP JP55187897A patent/JPS57113158A/en active Pending
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